SAA7113H/V2,518 Trident Microsystems, Inc., SAA7113H/V2,518 Datasheet - Page 44

• Manufacturer Part Number: SAA7113H/V2,518
• Manufacturer: Trident Microsystems, Inc.

Specifications of SAA7113H/V2,518

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Philips Semiconductors
9397 750 14232
Product data sheet
9.2.16 Subaddress 0Fh
Table 42:
Table 43:
Function
50 Hz
Fast color time constant (FCTC)
Nominal time constant
Fast time constant
Disable chrominance comb filter (DCCF)
Chrominance comb filter on (during lines determined by
VREF = 1; see
Chrominance comb filter permanently off
Color standard selection (CSTD0 to CSTD2); logic levels 100, 110 and 111 are reserved, do
not use
PAL BGHIN
NTSC 4.43 (50 Hz)
Combination-PAL N
NTSC N
SECAM
Clear DTO (CDTO)
Disabled
Every time CDTO is set, the internal subcarrier DTO phase
is reset to 0 and the RTCO output generates a logic 0 at
time slot 68 (see external document “RTC Functional
Description” , available on request). So an identical
subcarrier phase can be generated by an external device
(e.g. an encoder).
Chrominance gain
value (if ACGC is set
to logic 1)
Minimum gain (0.5)
Nominal gain (1.125)
Maximum gain (7.5)
Chrominance control subaddress 0Eh
Chrominance gain control subaddress 0Fh (D6 to D0)
Table
46)
60 Hz
special level adjustment:
brightness subaddress 0Ah = 95h;
contrast subaddress 0Bh = 48h)
NTSC 4.43 (60 Hz)
NTSC M (or NTSC-Japan with
PAL 4.43 (60 Hz)
PAL M
reserved
Control bits D6 to D0
CGAIN6 CGAIN5 CGAIN4 CGAIN3 CGAIN2 CGAIN1 CGAIN0
0
0
1
Rev. 02 — 9 May 2005
0
1
1
0
0
1
…continued
0
0
1
Control bit
FCTC
FCTC
DCCF
DCCF
CSTD2
CSTD1
CSTD0
CSTD2
CSTD1
CSTD0
CSTD2
CSTD1
CSTD0
CSTD2
CSTD1
CSTD0
CSTD2
CSTD1
CSTD0
CDTO
CDTO
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
9-bit video input processor
0
1
1
SAA7113H
Logic
level
0
1
0
1
0
0
0
0
0
1
0
1
0
0
1
1
1
0
1
0
1
0
0
1
Data bit
D2
D2
D3
D3
D6
D5
D4
D6
D5
D4
D6
D5
D4
D6
D5
D4
D6
D5
D4
D7
D7
0
0
1
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