5962-8984102LA E2V, 5962-8984102LA Datasheet - Page 15

• Manufacturer Part Number: 5962-8984102LA
• Manufacturer: E2V

Specifications of 5962-8984102LA

• Lead Free Status / RoHS Status: Supplier Unconfirmed

DEFENSE SUPPLY CENTER COLUMBUS
DSCC FORM 2234
APR 97
4. QUALITY ASSURANCE PROVISIONS
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535,
appendix A.
4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all
devices prior to quality conformance inspection. The following additional criteria shall apply:
tests prior to burn-in are optional at the discretion of the manufacturer.
of MIL-STD-883, shall be included as part of the screening procedure with the following conditions:
A
T = Temperature in Kelvin (i.e., °C + 273 = K).
t
t
K = Boltzmanns constant = 8.62 x 10
The maximum bake temperature shall not exceed +250°C.
1
2
COLUMBUS, OHIO 43216-5000
F
= Time (hrs) at temperature T
= Time (hrs) at temperature T
= Acceleration factor (unitless quantity) = t
a. Burn-in test, method 1015 of MIL-STD-883.
b. Interim and final electrical parameters shall be as specified in table II herein, except interim electrical parameter
c. An endurance/retention test prior to burn-in (may be performed at wafer level), in accordance with method 1033
MICROCIRCUIT DRAWING
(1)
(2)
(3)
(4)
(1)
(2)
(3)
(4)
(5)
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent
specified in test method 1015 of MIL-STD-883.
This pattern must have all cells programmed in a high or low state (not neutralized).
proper state shall constitute a device failure and shall be added as failures for PDA calculation.
100 cycles. After cycling, devices containing bits which fail to verify shall be considered device failures.
time may be accelerated by using higher temperature in accordance with the Arrhenius Relationship:
(at the manufacturer's option, high temperature equivalent subgroups 2 and 8A or low temperature equivalent
subgroups 3 and 8B may be used in lieu of subgroups 1 and 7). Devices having any logic array bits not in the
proper state after storage shall constitute device failure.
burn-in with no reprogramming allowed between the start of data retention bake and the end of burn-in.
Exercising this option will result in data retention bake failures being caught and included in post burn-in PDA
calculations.
Test condition D. The test circuit shall be maintained by the manufacturer under document revision level
TA = +125°C, minimum.
Devices shall be burned-in containing a pattern that assures all inputs and I/O's are dynamically switched.
The burn-in pattern shall be read before and after burn-in. Devices having any logic array bits not in the
Cycling may be at equipment room ambient temperature and shall cycle all bit locations for a minimim of
The retention pattern must have a minimum of 50 percent of the logic array programmed.
After cycling, perform a high temperature unbiased bake for a minimum of 48 hours at +150°C. The bake
After cycling and bake, and prior to burn-in, read the data retention pattern. Test using subgroups 1 and 7
At the manufacturer's option, the testing specified in 4.2c(4) may be deleted if the devices are put into
STANDARD
1
2
.
.
-5
eV/°K using an apparent activation energy (E
1
/t
2
.
SIZE
A
REVISION LEVEL
J
A
) of 0.6 eV.
SHEET
5962-89841
15