5962-89841063A QP SEMICONDUCTOR, 5962-89841063A Datasheet - Page 17

• Manufacturer Part Number: 5962-89841063A
• Manufacturer: QP SEMICONDUCTOR

Specifications of 5962-89841063A

• Lead Free Status / RoHS Status: Supplier Unconfirmed

DEFENSE SUPPLY CENTER COLUMBUS
DSCC FORM 2234
APR 97
of MIL-STD-883, shall be included as part of the screening procedure with the following conditions:
A
T = Temperature in Kelvin (i.e., °C + 273 = K).
t
t
K = Boltzmann’s constant = 8.62 x 10
The maximum bake temperature shall not exceed +250°C.
4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of
MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply.
4.3.1 Group A inspection.
changes which may affect capacitance. Sample size is 15 devices with no failures, and all input and output terminals
tested.
which may affect I
1
2
COLUMBUS, OHIO 43218-3990
F
= Time (hrs) at temperature T
= Time (hrs) at temperature T
= Acceleration factor (unit less quantity) = t
c. An endurance/retention test prior to burn-in (may be performed at wafer level), in accordance with method 1033
a. Tests shall be as specified in table II herein.
b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted.
c. Subgroup 4 (C
d. I
e. Subgroups 7, 8A, and 8B shall be sufficient to verify the truth table.
MICROCIRCUIT DRAWING
(1)
(2)
(3)
(4)
(5)
OS
Cycling may be at equipment room ambient temperature and shall cycle all bit locations for a minimum of 100
cycles. After cycling, devices containing bits which fail to verify shall be considered device failures.
The retention pattern must have a minimum of 50 percent of the logic array programmed.
After cycling, perform a high temperature unbiased bake for a minimum of 48 hours at +150°C. The bake
time may be accelerated by using higher temperature in accordance with the Arrhenius Relationship:
After cycling and bake, and prior to burn-in, read the data retention pattern. Test using subgroups 1 and 7 (at
the manufacturer's option, high temperature equivalent subgroups 2 and 8A or low temperature equivalent
subgroups 3 and 8B may be used in lieu of subgroups 1 and 7). Devices having any logic array bits not in the
proper state after storage shall constitute device failure.
At the manufacturer's option, the testing specified in 4.2c(4) may be deleted if the devices are put into burn-in
with no reprogramming allowed between the start of data retention bake and the end of burn-in. Exercising this
option will result in data retention bake failures being caught and included in post burn-in PDA calculations.
measurements in subgroup 1 shall be measured only for the initial test and after process or design changes
STANDARD
OS
. Sample size is 15 devices with no failures, and all output terminals tested.
IN
and C
I/O/Q
1
2
.
.
measurements) shall be measured only for the initial test and after process or design
-5
eV/°K using an apparent activation energy (E
1
/t
2
.
SIZE
A
REVISION LEVEL
L
A
) of 0.6 eV.
SHEET
5962-89841
17