EPXA4F672C2ES Altera, EPXA4F672C2ES Datasheet - Page 2

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EPXA4F672C2ES

Manufacturer Part Number
EPXA4F672C2ES
Description
Manufacturer
Altera
Datasheet

Specifications of EPXA4F672C2ES

Device System Gates
1052000
Function
Excalibur Device
Frequency (max)
200MHz
Operating Supply Voltage (typ)
1.8V
Mounting
Surface Mount
Pin Count
672
Package Type
FBGA
Lead Free Status / RoHS Status
Not Compliant

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Excalibur Device Overview
2
I
I
I
I
I
Multiple and separate clock domains controlled by software-
programmable phased-lock loops (PLLs) for embedded
processor, SDRAM, and PLD
Advanced packaging options (see
1.8-V supply voltage, but many I/O standards supported:
SOPC Builder system development tool
Extended Quartus
support
ClockBoost
embedded stripe and the PLD
ClockLock
PLD
SSTL-3
LVTTL
GTL+
LVDS
Intuitive graphical user interface (GUI) simplifies system
definition and customization
Wizard interface facilitates function customization for each
component
Automatically-generated logic integrates processors,
memories, peripherals, IP cores, on-chip buses and bus
arbiters
VHDL or Verilog HDL code created for system connection
Software develoment environment generated to match the
target hardware
Integrated hardware and software development
environment
MegaWizard
processor, PLD, bus connections, and peripherals
C/C++ compiler, source-level debugger, and RTOS support
This document provides updated information about
Excalibur devices and should be used together with the
APEX 20K Programmable Logic Device Family Data Sheet.
circuitry reduces clock delay and skew in the
®
circuitry provides clock multiplication for the
Plug-In interface configures the embedded
II development environment for Excalibur
Tables 2
and
Altera Corporation
3
on
page
3)

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