5962-8983913RX Cypress Semiconductor Corp, 5962-8983913RX Datasheet

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5962-8983913RX

Manufacturer Part Number
5962-8983913RX
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of 5962-8983913RX

Process Technology
EECMOS
# Macrocells
8
# I/os (max)
8
Frequency (max)
62.5MHz
Propagation Delay Time
15ns
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-55C to 125C
Operating Temperature Classification
Military
Mounting
Through Hole
Pin Count
20
Supply Current
130mA
Lead Free Status / RoHS Status
Not Compliant
Cypress Semiconductor Corporation
Document #: 38-03025 Rev. *A
Features
• Active pull-up on data input pins
• Low power version (16V8L)
• Standard version has low power
• CMOS Flash technology for electrical erasability and
• PCI-compliant
• User-programmable macrocell
— 55 mA max. commercial (10, 15, 25 ns)
— 65 mA max. industrial (10, 15, 25 ns)
— 65 mA military (15 and 25 ns)
— 90 mA max. commercial (10, 15, 25 ns)
— 115 mA max. commercial (7 ns)
— 130 mA max. military/industrial (10, 15, 25 ns)
reprogrammability
— Output polarity control
— Individually selectable for registered or combina-
Pin Configurations
Logic Block Diagram (PDIP/CDIP)
torial operation
GND
10
OE/I
11
9
Macrocell
8
I/O
12
I
9
8
0
Macrocell
CLK/I
8
I/O
13
I
8
GND
7
1
I
I
I
I
I
I
I
I
0
1
2
3
4
5
6
8
7
Top View
1
2
3
4
5
6
7
8
9
10
3901 North First Street
Macrocell
DIP
I
I/O
7
8
6
14
PROGRAMMABLE
2
AND ARRAY
(64 x 32)
20
19
18
17
16
15
14
13
12
11
Macrocell
Flash-Erasable Reprogrammable
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
OE/I
I/O
I
8
15
6
5
CC
3
7
6
5
4
3
2
1
0
9
Functional Description
The Cypress PALCE16V8 is a CMOS Flash Electrical
Erasable second-generation programmable array logic
device. It is implemented with the familiar sum-of-product
(AND-OR) logic structure and the programmable macrocell.
• Up to 16 input terms and eight outputs
• 7.5 ns com’l version
• 10 ns military/industrial versions
• High reliability
5 ns t
5 ns t
7.5 ns t
125-MHz state machine
7 ns t
10 ns t
10 ns t
62-MHz state machine
— Proven Flash technology
— 100% programming and functional testing
Macrocell
I
8
I/O
4
5
16
4
CO
S
CO
S
PD
PD
I
I
I
I
I
7
3
4
5
6
Macrocell
San Jose
17
8
I
I/O
3
4
4
5
6
7
8
5
9 10111213
CMOS PAL
3 2 1
PLCC/LCC
Top View
,
Macrocell
CA 95134
I/O
20
8
18
I
2
3
6
19
18
17
16
15
14
Macrocell
I/O
I/O
I/O
I/O
I/O
I/O
I
1
2
19
6
5
4
3
2
Revised April 22, 2004
8
7
PALCE16V8
®
CLK/I
408-943-2600
V
1
20
CC
Device
0

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5962-8983913RX Summary of contents

Page 1

... Individually selectable for registered or combina- torial operation Logic Block Diagram (PDIP/CDIP) GND Macrocell 11 12 OE/I I Pin Configurations Cypress Semiconductor Corporation Document #: 38-03025 Rev. *A Flash-Erasable Reprogrammable • input terms and eight outputs • 7.5 ns com’l version 7 125-MHz state machine • military/industrial versions 62-MHz state machine • ...

Page 2

Selection Guide Generic Part Number Com’l/Ind PALCE16V8-5 5 PALCE16V8-7 7.5 PALCE16V8-10 10 PALCE16V8-15 15 PALCE16V8-25 25 PALCE16V8L-15 15 PALCE16V8L-25 25 Shaded areas contain preliminary information. Functional Description The PALCE16V8 is executed in a 20-pin 300-mil molded DIP, a 300-mil cerdip, ...

Page 3

Macrocell Document #: 38-03025 Rev. *A CL0 CLK CL1 x CG for pin for pin 12 and 19 0 PALCE16V8 To ...

Page 4

Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Supply Voltage to Ground Potential (Pin 24 to Pin 12) ...

Page 5

AC Test Loads and Waveforms Specification Closed · H: Open PZX EA Z · L: Closed · Z: Open PXZ ER L · Z: Closed ...

Page 6

Commercial and Industrial Switching Characteristics Parameter Description [7] t Clock Width HIGH WH [7] t Clock Width LOW WL f External Maximum MAX1 Frequency (1/( Data Path Maximum MAX2 Frequency (1/( ...

Page 7

Switching Waveform INPUTS, I/O, REGISTERED FEEDBACK REGISTERED OUTPUTS COMBINATORIAL OUTPUTS Power-Up Reset Waveform 10% POWER SUPPLY VOLTAGE REGISTERED ACTIVE LOW OUTPUTS CLOCK Document #: 38-03025 Rev ...

Page 8

Functional Logic Diagram for PALCE16V8 PIN NUMBERS PRODUCT LINE FIRST CELL NUMBERS 128 160 192 224 2 256 288 320 352 384 416 448 480 3 512 544 576 608 ...

Page 9

Ordering Information (mA) (ns) (ns) (ns) Ordering Code 115 PALCE16V8-5JC 115 7 PALCE16V8-7JC PALCE16V8-7PC 90 10 7.5 7 PALCE16V8-10JC PALCE16V8-10PC 130 10 7.5 7 PALCE16V8-10JI PALCE16V8-10PI 130 ...

Page 10

MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics Parameter ...

Page 11

Package Diagrams (continued) Document #: 38-03025 Rev. *A 20-Lead Plastic Leaded Chip Carrier J61 20-Square Leadless Chip Carrier L61 PALCE16V8 51-85000-*A 51-80049-** Page ...

Page 12

... Document #: 38-03025 Rev. *A © Cypress Semiconductor Corporation, 2004. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress ...

Page 13

Document History Page Document Title: PALCE16V8 Flash Erasable Reprogrammable CMOS PAL Document Number: 38-03025 REV. ECN NO. Issue Date ** 106370 07/11/01 *A 213375 See ECN Document #: 38-03025 Rev. *A Orig. of Change SZV Change from Spec Number: 38-00364 ...

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