DM74AS280NX Fairchild Semiconductor, DM74AS280NX Datasheet - Page 4

• Manufacturer Part Number: DM74AS280NX
• Manufacturer: Fairchild Semiconductor

Specifications of DM74AS280NX

• Logical Function: Parity Gen/Checker
• Logic Family: AS
• Number Of Elements: 1
• Number Of Bits: 9
• Propagation Delay Time: 12ns
• High Level Output Current: -2mA
• Low Level Output Current: 20mA
• Operating Supply Voltage (typ): 5V
• Package Type: PDIP W
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Pin Count: 14
• Mounting: Through Hole
• Operating Temperature Classification: Commercial
• Technology: Bipolar
• Lead Free Status / RoHS Status: Not Compliant

www.fairchildsemi.com
Typical Applications
Three DM74AS280s can be used to implement a 25-line
parity generator/checker.
As an alternative, the outputs of two or three parity genera-
tors/checkers can be decoded with a 2-input (AS86) or 3-
FIGURE 2. 81-Line Parity/Generator Checker
Parity/Generator Checker
FIGURE 1. 25-Line
4
input (S135) exclusive-OR gate for 18 or 27-line parity
applications.
Longer word lengths can be implemented by cascading
DM74AS280s. As shown in Figure 2, parity can be gener-
ated for word lengths up to 81 bits.