ICS853L022AM IDT, Integrated Device Technology Inc, ICS853L022AM Datasheet

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ICS853L022AM

Manufacturer Part Number
ICS853L022AM
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of ICS853L022AM

Logical Function
Translator
High Level Output Current
-50mA
Low Level Output Current
50mA
Operating Supply Voltage (typ)
-3.3/3.3V
Package Type
SOIC
Operating Supply Voltage (max)
-3.8/3.8V
Operating Supply Voltage (min)
-3/3V
Abs. Propagation Delay Time
750ps
Mounting
Surface Mount
Pin Count
8
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Not Compliant
B
G
single ended clock input accepts LVCMOS or LVTTL input lev-
els and translate them to LVPECL levels. The small outline 8-
pin TSSOP package makes this device ideal for applications
where space, high performance and low power are important.
853L022AG
HiPerClockS™
ICS
LOCK
ENERAL
D
The ICS853L022 is a Dual LVCMOS / LVTTL-to-
Differential 3.3V LVPECL translator and a mem-
ber of the HiPerClocks™ family of High
Performance Clocks Solutions from ICS. The
ICS853L022 has single ended clock inputs. The
IAGRAM
Integrated
Circuit
Systems, Inc.
D
D0
D1
ESCRIPTION
Q0
nQ0
Q1
nQ1
www.icst.com/products/hiperclocks.html
1
P
F
D
2 differential LVPECL outputs
LVCMOS/LVTTL clock inputs
Output frequency: 350MHz (typical)
Part-to-part skew: 400 (maximum)
Propagation Delay: 450ps (typical)
Additive phase jitter, RMS: 0.03ps (typical)
LVPECL mode operating voltage supply range:
V
ECL mode operating voltage supply range:
V
-40°C to 85°C ambient operating temperature
Lead-Free package RoHS compliant
EATURES
IN
UAL
CC
CC
= 3.0V to 3.8V, V
= 0V, V
A
LVCMOS / LVTTL-
3.90mm x 4.90mm x 1.37mm package body
SSIGNMENT
3mm x 3mm x 0.95mm package body
EE
= -3.8V to -3.0V
8-Lead TSSOP, 118 mil
8-Lead SOIC, 150 mil
nQ0
nQ1
3.3V LVPECL T
Q0
Q1
ICS853L022
EE
= 0V
G Package
M Package
Top View
Top View
1
2
3
4
8
7
6
5
ICS853L022
V
D0
D1
V
EE
CC
TO
REV. A OCTOBER 29, 2008
-D
IFFERENTIAL
RANSLATOR

Related parts for ICS853L022AM

ICS853L022AM Summary of contents

Page 1

Integrated Circuit Systems, Inc ENERAL ESCRIPTION The ICS853L022 is a Dual LVCMOS / LVTTL-to- ICS Differential 3.3V LVPECL translator and a mem- HiPerClockS™ ber of the HiPerClocks™ family of High Performance Clocks Solutions from ICS. The ICS853L022 has ...

Page 2

Integrated Circuit Systems, Inc ABLE IN ESCRIPTIONS ...

Page 3

Integrated Circuit Systems, Inc BSOLUTE AXIMUM ATINGS Supply Voltage, V 4.6V (LVPECL mode Negative Supply Voltage, V -4.6V (ECL mode Inputs, V (LVPECL mode) -0. Inputs, V (ECL mode) 0.5V ...

Page 4

Integrated Circuit Systems, Inc. T 2D. ECL DC C ABLE HARACTERISTICS ...

Page 5

Integrated Circuit Systems, Inc. P ARAMETER LVPECL V EE -1.8V to -1. UTPUT OAD EST IRCUIT nQx PART 1 Qx nQy PART sk(pp ART TO ...

Page 6

Integrated Circuit Systems, Inc. T 3.3V LVPECL O ERMINATION FOR The clock layout topology shown below is a typical termina- tion for LVPECL outputs. The two different layouts mentioned are recommended only as guidelines. FOUT and nFOUT are low impedance ...

Page 7

Integrated Circuit Systems, Inc. This section provides information on power dissipation and junction temperature for the ICS853L022. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS853L022 is the sum of the core ...

Page 8

Integrated Circuit Systems, Inc. 3. Calculations and Equations. LVPECL output driver circuit and termination are shown in Figure 4. Figure 4. LVPECL Driver Circuit and Termination T o calculate worst case power dissipation into the load, use the following equations ...

Page 9

Integrated Circuit Systems, Inc ABLE VS IR LOW ABLE FOR JA Multi-Layer PCB, JEDEC Standard Test Boards T 5B ABLE VS IR LOW ABLE FOR JA Single-Layer PCB, JEDEC Standard ...

Page 10

Integrated Circuit Systems, Inc ACKAGE UTLINE UFFIX FOR T 6A ABLE ACKAGE IMENSIONS ...

Page 11

Integrated Circuit Systems, Inc ABLE RDERING NFORMATION ...

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