PI3HDMI101-BZHEX Pericom Semiconductor, PI3HDMI101-BZHEX Datasheet - Page 2

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PI3HDMI101-BZHEX

Manufacturer Part Number
PI3HDMI101-BZHEX
Description
Buffers & Line Drivers redriver w/Active Eye technology
Manufacturer
Pericom Semiconductor
Datasheet

Specifications of PI3HDMI101-BZHEX

Lead Free Status / RoHS Status
Supplier Unconfirmed
HDMI, High-Defi nition Multimedia Interface, and Deep Color are trademarks of
HDMI Licensing, LLC in the United States and other countries.
Pin Confi guration
TMDS Receiver Block
Each high speed data and clock input has integrated equalization that can eliminate deterministic jitter caused
by input cables. All activity can be confi gured using pin strapping. The Rx block is designed to receive all
relevant signals directly from the HDMI
data, 1 pixel clock, and DDC signals. TMDS channels have the following temination scheme for Rx Sense
support. The switching between 50ohm termination vs. 250Kohm termination is done automatically. The
PI3HDMI101-B monitors the 50-ohm termination in the Rx chipset behind our part, and when this 50ohm
termination is not present, we disable our 50ohm termination at our input.
250K ohm
DCC_EN
IN_CLK–
IN_CLK+
IN_Dx+/-, IN_CLK+/-
IN_D0+
IN_D1+
IN_D2+
IN_D0–
IN_D1–
IN_D2–
EQ_S0
EQ_S1
GND
GND
GND
VDD
VDD
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
ADVANCE INFORMATION - COMPANY CONFIDENTIAL
42 41 40 39
18 19 20 21
GND
AVdd
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
R1
SCL_T
VDD
GND
OUT_CLK–
OUT_CLK+
VDD
OUT_D0–
OUT_D0+
GND
OUT_D1–
OUT_D1+
VDD
OUT_D2–
OUT_D2+
GND
VDD
OC_S3
R2
TM
connector without any additional circuitry, 3 High speed TMDS
08-0013
2
1:1 Active HDMI
& I
2
TM
C Buffer and RxTerm detection circuitry
Redriver with Optimized Equalization
PS8956A
PI3HDMI101-B
03/24/08

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