ICS830S21AMI IDT, Integrated Device Technology Inc, ICS830S21AMI Datasheet - Page 4

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ICS830S21AMI

Manufacturer Part Number
ICS830S21AMI
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of ICS830S21AMI

Number Of Outputs
1
Operating Supply Voltage (max)
3.465V
Operating Temp Range
-40C to 85C
Propagation Delay Time
2ns
Operating Supply Voltage (min)
2.375V
Mounting
Surface Mount
Pin Count
8
Operating Supply Voltage (typ)
2.5/3.3V
Package Type
SOIC
Duty Cycle
53%
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Not Compliant

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Manufacturer
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Manufacturer:
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Table 3D. Differential DC Characteristics, V
NOTE 1:V
NOTE 2: Common mode input voltage is defined as V
AC Electrical Characteristics
Table 4A. AC Characteristics, V
NOTE 1: Measured from the differential input crossing point to the output at V
NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltage and with equal load conditions.
Using the same type of input on each device, the output is measured at V
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
Table 4B. AC Characteristics, V
NOTE 1: Measured from the differential input crossing point to the output at V
NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltage and with equal load conditions.
Using the same type of input on each device, the output is measured at V
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
IDT™ / ICS™ LVCMOS/LVTTL TRANSLATOR
Symbol
I
I
V
V
V
Parameter
f
t
tsk(pp)
tjit
t
odc
Parameter
f
t
tsk(pp)
tjit
t
odc
IH
IL
MAX
PD
R
MAX
PD
R
ICS830S21I
1-TO-1, 2.5V, 3.3V DIFFERENTIAL-TO-LVCMOS/LVTTL TRANSLATOR
PP
CMR
BB
/ t
/ t
F
F
IL
Parameter
Input High Current
Input Low Current
Peak-to-Peak Voltage; NOTE 1
Common Mode Input Voltage;
NOTE 1, 2
Output Voltage Reference
should not be less than -0.3V.
Symbol
Output Frequency
Propagation Delay, NOTE 1
Part-to-Part Skew; NOTE 2, 3
Buffer Additive Phase jitter, RMS;
refer to Additive Phase Jitter Section
Output Rise/Fall Time
Output Duty Cycle
Symbol
Output Frequency
Propagation Delay, NOTE 1
Part-to-Part Skew; NOTE 2, 3
Buffer Additive Phase jitter, RMS;
refer to Additive Phase Jitter Section
Output Rise/Fall Time
Output Duty Cycle
DD
DD
= 3.3V ± 5%, T
= 2.5V ± 5%, T
V
DD
V
DD
DD
= 3.465V or 2.625V, V
= 3.3V ± 5% or 2.5V ± 5%, T
= V
Test Conditions
A
A
IN
350MHz, Integration Range
350MHz, Integration Range
= -40°C to 85°C
= -40°C to 85°C
IH
= 3.465V or 2.625V
.
(12kHz – 20MHz)
(12kHz – 20MHz)
Test Conditions
Test Conditions
20% to 80%
20% to 80%
ƒ ≤ 266MHz
ƒ ≤ 266MHz
4
DD
DD
IN
/2.
/2.
DD
DD
= 0V
/2.
/2.
GND + 0.5
Minimum
V
A
DD
= -40°C to 85°C
-150
0.15
– 1.4
Minimum
Minimum
0.95
125
85
47
47
1
ICS830S21AMI REV. A MARCH 21, 2008
V
Typical
DD
– 1.3
Typical
Typical
0.11
0.11
350
350
V
Maximum
V
DD
Maximum
Maximum
DD
150
1.5
– 0.85
1.95
525
500
550
500
– 1.2
53
53
1
2
1
Units
Units
Units
MHz
MHz
µA
µA
ns
ps
ps
ps
ns
ps
ps
ps
V
V
V
%
%

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