MT18HVF25672PDY-667E1 Micron Technology Inc, MT18HVF25672PDY-667E1 Datasheet - Page 16

• Manufacturer Part Number: MT18HVF25672PDY-667E1
• Manufacturer: Micron Technology Inc

Specifications of MT18HVF25672PDY-667E1

• Main Category: DRAM Module
• Sub-category: DDR2 SDRAM
• Module Type: 240VLPRDIMM
• Device Core Size: 72b
• Organization: 256Mx72
• Total Density: 2GByte
• Chip Density: 1Gb
• Access Time (max): 45ps
• Maximum Clock Rate: 667MHz
• Operating Supply Voltage (typ): 1.8V
• Operating Current: 1.278A
• Number Of Elements: 18
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 240
• Mounting: Socket
• Lead Free Status / RoHS Status: Compliant

Table 12: PLL Specifications
CU877 device or equivalent
Table 13: PLL Clock Driver Timing Requirements and Switching Characteristics
PDF: 09005aef8286b286
hvf18c128_256x72pdy.pdf - Rev. B 03/10 EN
Parameter
DC high-level
input voltage
DC low-level
input voltage
Input voltage (limits)
DC high-level
input voltage
DC low-level
input voltage
Input differential-pair
cross voltage
Input differential
voltage
Input differential
voltage
Input current
Output disabled
current
Static supply current
Dynamic supply
Input capacitance
Parameter
Stabilization time
Input clock slew rate
SSC modulation frequency
SSC clock input frequency deviation
PLL loop bandwidth (–3dB from unity gain)
Note:
Symbol
V
V
I
I
DDLD
ID(DC)
ID(AC)
V
V
V
V
I
C
V
V
ODL
DD
I
IH
IN
IH
IX
IN
IL
IL
I
1. PLL timing and switching specifications are critical for proper operation of the DDR2
DIMM. This is a subset of parameters for the specific PLL used. Detailed PLL information
is available in JEDEC standard JESD82.
RESET#, CK, CK#
1GB, 2GB (x72, ECC, DR) 240-Pin DDR2 VLP SDRAM RDIMM
Each input
CK, CK#
CK, CK#
CK, CK#
CK, CK#
CK, CK#
CK, CK#
RESET#
RESET#
RESET#
Pins
N/A
RESET# = V
outputs open (not con-
CK, CK# = 270 MHz, all
Differential input
Differential input
Differential input
Differential input
Differential input
CK = CK# = LOW
nected to PCB)
Symbol
V
V
V
16
I
I
I
Condition
slr(i)
= V
= V
= V
LVCMOS
LVCMOS
or V
t
–
–
–
L
DD
DD
DD
SS
–
IL(DC)
; V
or V
or V
or V
I
Micron Technology, Inc. reserves the right to change products or specifications without notice.
= V
SS
SS
SS
IH(AC)
Register and PLL Specifications
Min
1.0
0.0
2.0
30
(V
–
0.65 × V
0.65 × V
DDQ
–250
Min
–10
100
0.3
/2) - 0.15
0.3
0.6
2
–
–
–
–
DD
DD
© 2007 Micron Technology, Inc. All rights reserved.
Max
–0.5
4.0
15
33
(V
–
0.35 × V
0.35 × V
V
DD
V
V
DD
DD
DD
Max
/2) - 0.15
250
500
300
10
3
–
–
–
+ 0.3
- 0.4
- 0.4
DD
DD
Units
MHz
V/ns
kHz
μs
%
Units
mA
µA
µA
µA
µA
pF
V
V
V
V
V
V
V
V