IDTICS83905AMLF IDT, Integrated Device Technology Inc, IDTICS83905AMLF Datasheet - Page 15

• Manufacturer Part Number: IDTICS83905AMLF
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDTICS83905AMLF

• Number Of Outputs: 6
• Operating Supply Voltage (max): 3.465V
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (min): 1.6V
• Mounting: Surface Mount
• Pin Count: 16
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Package Type: SOIC N
• Input Frequency: 40MHz
• Duty Cycle: 53%
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

ICS83905 Data Sheet
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS83905.
Equations and example calculations are also provided.
1.
The total power dissipation for the ICS83905 is the sum of the core power plus the analog power plus the power dissipated in the load(s). The
following is the power dissipation for V
Dynamic Power Dissipation at 25MHz
Total Power Dissipation
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. The
maximum recommended junction temperature for HiPerClockS devices is 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
a multi-layer board, the appropriate value is 100.3°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 7. Thermal Resistance
ICS83905AM REVISION B JULY 20, 2009
Meters per Second
Multi-Layer PCB, JEDEC Standard Test Boards
Power Dissipation.
•
•
•
•
•
70°C + 0.125W *100.3°C/W = 82.5°C. This is below the limit of 125°C.
Power (core)
Output Impedance R
Output Current I
Power Dissipation on the R
Power (R
Total Power Dissipation on the R
Total Power (R
Power (25MHz) = C
Total Power
Total Power
= Power (core)
= 51.98mW + 39mW + 34.2mW
= 125.1mW
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
JA
A
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
OUT
MAX
) = R
(25MHz) = 5.70mW * 6 = 34.2mW
MAX
OUT
OUT
= V
OUT
PD
+ Total Power (R
= V
DD_MAX
OUT
) =
* (I
* Frequency * (V
DD_MAX
6.5mW * 6 = 39mW
Power Dissipation due to Loading 50Ω to V
OUT
θ
JA
OUT
* (I
DD
)
for 16 Lead TSSOP, Forced Convection
2
per LVCMOS output
= 7Ω * (30.4mA)
DD
= 3.3V + 5% = 3.465V, which gives worst case results.
/ [2 * (50Ω + R
OUT
+ I
OUT
DDO
JA
DD
) + Total Power (25MHz)
* Pd_total + T
) = 3.465V *(10mA + 5mA) = 51.9mW
)
2
= 19pF * 25MHz * (3.465V)
OUT
2
= 6.5mW per output
)] = 3.465V / [2 * (50Ω + 7Ω)] = 30.4mA
θ
JA
A
100.3°C/W
by Velocity
0
15
DD
/2
2
= 5.70mW per output
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
96.0°C/W
JA
1
must be used. Assuming no air flow and
©2009 Integrated Device Technology, Inc.
93.9°C/W
2.5