MC14LC5480SD Freescale, MC14LC5480SD Datasheet - Page 9

• Manufacturer Part Number: MC14LC5480SD
• Manufacturer: Freescale
• Type: PCMr

Specifications of MC14LC5480SD

• Number Of Channels: 1
• Gain Control: Adjustable
• Number Of Adc's: 1
• Number Of Dac's: 1
• Adc/dac Resolution: 13b
• Package Type: SSOP
• Sample Rate: 8KSPS
• Number Of Adc Inputs: 1
• Number Of Dac Outputs: 1
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Pin Count: 20
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

PC BOARD MOUNTING
board for optimum noise performance. If the device is to be
used in a socket, it should be placed in a low parasitic pin
inductance (generally, low–profile) socket.
POWER SUPPLY, GROUND, AND NOISE
CONSIDERATIONS
tions which often require plugging the PC board into a rack
with power applied. This is known as ‘‘hot–rack insertion.’’ In
these applications care should be taken to limit the voltage
on any pin from going positive of the V DD pins, or negative of
the V SS pins. One method is to extend the ground and power
contacts of the PCB connector. The device has input protec-
tion on all pins and may source or sink a limited amount of
current without damage. Current limiting may be accom-
plished by series resistors between the signal pins and the
connector contacts.
with noise. This includes noise on the power supply, noise
generated by the digital circuitry on the device, and cross
coupling digital or radio frequency signals into the audio sig-
nals of this device. The best way to prevent noise is to:
12. Keep radio frequency signals as far away from the audio
13. Use short, low inductance traces for the audio circuitry
14. Use short, low inductance traces for digital and RF
15. Bypass capacitors should be connected from the V DD
16. Use a short, wide, low inductance trace to connect the
11. Keep digital signals as far away from audio signals as
It is recommended that the device be soldered to the PC
This device is intended to be used in switching applica-
The most important considerations for PCB layout deal
possible.
signals as possible.
to reduce inductive, capacitive, and radio frequency
noise sensitivities.
circuitry to reduce inductive, capacitive, and radio
frequency radiated noise.
and V AG pins to V SS with minimal trace length. Ceramic
monolithic capacitors of about 0.1 F are acceptable to
decouple the device from its own noise. The V DD
capacitor helps supply the instantaneous currents of the
digital circuitry in addition to decoupling the noise which
may be generated by other sections of the device or
other circuitry on the power supply. The V AG decoupling
capacitor helps to reduce the impedance of the V AG pin
to V SS at frequencies above the bandwidth of the V AG
generator, which reduces the susceptibility to RF noise.
V SS ground pin to the power supply ground. The V SS pin
is the digital ground and the most negative power supply
pin for the analog circuitry. All analog signal processing
is referenced to the V AG pin, but because digital and RF
circuitry will probably be powered by this same ground,
care must be taken to minimize high frequency noise in
the V SS trace. Depending on the application, a double–
sided PCB with a V SS ground plane connecting all of the
digital and analog V SS pins together would be a good
grounding method. A multilayer PC board with a ground
plane connecting all of the digital and analog V SS pins
together would be the optimal ground configuration.
These methods will result in the lowest resistance and
the lowest inductance in the ground circuit. This is
important to reduce voltage spikes in the ground circuit
Freescale Semiconductor, Inc.
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17. Use a short, wide, low inductance trace to connect the
18. The V AG pin is the reference for all analog signal
19. For applications using multiple MC14LC5480 PCM
20. The MC14LC5480 is fabricated with advanced high–
resulting from the high speed digital current spikes. The
magnitude of digitally induced voltage spikes may be
hundreds of times larger than the analog signal the
device is required to digitize.
V DD power supply pin to the 5 V power supply.
Depending on the application, a double–sided PCB with
V DD bypass capacitors to the V SS ground plane, as
described above, may complete the low impedance
coupling for the power supply. For a multilayer PC board
with a power plane, connecting all of the V DD pins to the
power plane would be the optimal power distribution
method. The integrated circuit layout and packaging
considerations for the 5 V V DD power circuit are
essentially the same as for the V SS ground circuit.
processing. In some applications the audio signal to be
digitized may be referenced to the V SS ground. To
reduce the susceptibility to noise at the input of the ADC
section, the three–terminal op amp may be used in a
differential to single–ended circuit to provide level
conversion from the V SS ground to the V AG ground with
noise cancellation. The op amp may be used for more
than 35 dB of gain in microphone interface circuits, which
will require a compact layout with minimum trace lengths
as well as isolation from noise sources. It is recom-
mended that the layout be as symmetrical as possible to
avoid any imbalances which would reduce the noise
cancelling benefits of this differential op amp circuit.
Refer to the application schematics for examples of this
circuitry.
If possible, reference audio signals to the V AG pin
instead of to the V SS pin. Handset receivers and tele-
phone line interface circuits using transformers may be
audio signal referenced completely to the V AG pin. Re-
fer to the application schematics for examples of this
circuitry. The V AG pin cannot be used for ESD or line
protection.
Codec–Filters, the V AG pins cannot be tied together. The
V AG pins are capable of sourcing and sinking current and
will each be driving the node, which will result in large
contention currents, crosstalk susceptibilities, and in-
creased noise.
speed CMOS technology that is capable of responding
to noise pulses on the clock pins of 1 ns or less. It should
be noted that noise pulses of such short duration may not
be seen with oscilloscopes that have less bandwidth
than 600 MHz. The most often encountered sources of
clock noise spikes are inductive or capacitive coupling of
high–speed logic signals, and ground bounce. The best
solution for addressing clock spikes from coupling is to
separate the traces and use short low inductance PC
board traces. To address ground bounce problems, all
integrated circuits should have high frequency bypass
capacitors directly across their power supply pins, with
low inductance traces for ground and power supply. A
less than optimum solution may be to limit the bandwidth
of the trace by adding series resistance and/or capaci-
tance at the input pin.