STM32F217ZET6 STMicroelectronics, STM32F217ZET6 Datasheet - Page 153

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STM32F217ZET6

Manufacturer Part Number
STM32F217ZET6
Description
MCU ARM 512KB FLASH 144LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F217ZET6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, Ethernet, I²C, IrDA, LIN, MMC, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
114
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
132K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 24x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11188

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STM32F215xx, STM32F217xx
Revision history
Table 88.
02-Feb-2010
13-Jul-2010
Date
Document revision history
Revision
1
2
Initial release.
Updated datasheet status to PRELIMINARY DATA.
Renamed high-speed SRAM, system SRAM.
Added UFBGA176 package, and note 1 related to LQFP176 package
in
Added information on ART accelerator and audio PLL (PLLI2S).
Added
Several updates on
Table 6: Alternate function
WKUP and VBUS signals removed from alternate functions and
moved to the “other functions” column in
ball
TRACESWO added in
STM32F21x pin and ball
mapping.
XTAL oscillator frequency updated on cover page, in
STM32F21x block diagram
interrupt/event controller
Updated list of peripherals used for boot mode in
modes.
Added Regulator bypass mode in
and
(regulator
Updated
backup
Added
Added SPI TI protocol in
(SPI).
Updated
(OTG_FS), and
speed
Added
characteristics.
Updated
1.4 mm package mechanical data
profile quad flat package 24 × 24 × 1.4 mm, package
Added
microcontrollers
figures in Appendix
and
Figure 90: Audio player solution using PLL, PLLI2S, USB and 1 crystal
and
Added random number generation feature. Added trademark for ART
accelerator and updated
accelerator (ART Accelerator™)
Table
Doc ID 17050 Rev 4
definitions.
Section 5.3.4: Operating conditions at power-up / power-down
A.4: USB OTG high speed (HS) interface
Figure 91: Audio PLL (PLLI2S) providing accurate I2S
(OTG_HS).
Table 4: USART feature
Note Note:
Section 5: Electrical
Table 87: Main applications versus package for STM32F20xxx
registers.
2,
Section 2.2.18: Real-time clock (RTC), backup SRAM and
Section 2.2.33: Universal serial bus on-the-go full-speed
Table 83: LQFP176 - Low profile quad flat package 24 × 24 ×
OFF).
Figure
Section 2.2.34: Universal serial bus on-the-go high-
in
11, and
in
A.1: Main applications versus
Table 5: STM32F21x pin and ball definitions
A.3: USB OTG full speed (FS) interface solutions
Section 2.2.19: Low-power
Figure 4: STM32F21x block
(EXTI).
Section 2.2.3: Adaptive real-time memory
definitions, and
Section 2.2.28: Serial peripheral interface
Table
mapping. ADC, DAC, oscillator, RTC_AF,
and in
characteristics, and
Changes
comparison.
86.
.
Section 2.2.17: Voltage
Section 2.2.12: External
and
Figure 79: LQFP176 - Low
Table 5: STM32F21x pin and
Table 6: Alternate function
solutions. Updated
Section 6.2: Thermal
modes.
package. Updated
Section 2.2.14: Boot
diagram,
Revision history
Figure 4:
outline.
regulator,
clock.
Table 5:
153/158
and

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