DS26502L+ Maxim Integrated Products, DS26502L+ Datasheet - Page 86
DS26502L+
Manufacturer Part Number
DS26502L+
Description
IC T1/E1/J1 64KCC ELEMENT 64LQFP
Manufacturer
Maxim Integrated Products
Type
BITS Elementr
Datasheet
1.DS26502LN.pdf
(125 pages)
Specifications of DS26502L+
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Frequency-max
-
Output
-
Input
-
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
HW
Mode
Bits 0 to 2: Receive Termination Select (RT0 to RT2)
Bits 3 to 5:Transmit Termination Select (TT0 to TT2)
Bits 6 and 7: MCLK Pre-Scaler (MPS0 to MPS1) (T1 Mode)
Bits 6 and 7: MCLK Pre-Scaler (MPS0 to MPS1) (E1 Mode)
MCLK (MHz)
MCLK (MHz)
RT2
TT2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
12.352
16.384
16.384
1.544
3.088
6.176
2.048
4.096
8.192
2.048
4.096
8.192
12.8
RT1
TT1
PIN 16
MPS1
MPS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
7
0
RT0
TT0
1
0
1
0
1
0
0
1
0
1
0
1
0
1
0
1
MPS1
MPS1
PIN 15
MPS0
MPS0
0
0
1
1
0
0
1
1
0
0
1
0
1
LIC4
Line Interface Control 4
33h
6
0
Internal Receive-Side Termination Disabled
Internal Receive-Side 75Ω Enabled
Internal Receive-Side 100Ω Enabled
Internal Receive-Side 120Ω Enabled
Internal Receive-Side 110Ω Enabled
Internal Receive-Side Termination Disabled
Internal Receive-Side Termination Disabled
Internal Receive-Side Termination Disabled
Internal Transmit-Side Termination Disabled
Internal Transmit-Side 75Ω Enabled
Internal Transmit-Side 100Ω Enabled
Internal Transmit-Side 120Ω Enabled
Internal Transmit-Side 110Ω Enabled
Internal Transmit-Side Termination Disabled
Internal Transmit-Side Termination Disabled
Internal Transmit-Side Termination Disabled
TERMINATION CONFIGURATION
TERMINATION CONFIGURATION
TT2
INTERNAL TRANSMIT
—
MPS0
5
0
INTERNAL RECEIVE
MPS0
0
1
0
1
0
1
0
1
0
1
0
0
1
TT1
—
4
0
JACKS (LIC2.3)
JACKS0 (LIC2.3)
86 of 125
TT0
0
0
0
0
1
1
1
1
—
3
0
0
0
0
0
0
RT2
—
2
0
JACKS1 (LIC2.7)
RT1
0
0
0
1
0
—
1
0
RT0
—
0
0
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