ICS93732AF IDT, Integrated Device Technology Inc, ICS93732AF Datasheet - Page 4

• Manufacturer Part Number: ICS93732AF
• Description: IC DDR PLL ZD BUFFER 28-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Zero Delay Bufferr

Specifications of ICS93732AF

• Input: Clock
• Output: Clock
• Frequency - Max: 340MHz
• Voltage - Supply: 2.3 V ~ 2.7 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Frequency-max: 340MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 93732AF

ICS93732
Notes:
1. Refers to transition on noninverting output.
2. While the pulse skew is almost constant over frequency, the duty cycle error
0578J—06/20/08
Timing Requirements
T
Operating Clock Frequency
Input Clock Duty Cycle
Clock Stabilization
1. Guaranteed by design, not 100% tested in production.
T
Switching Characteristics
Duty Cycle (Sign Ended)
A
A
Output to output Skew
Cycle to cycle Jitter
= 0 - 70°C; Supply Voltage AV
= 0 - 70°C; Supply Voltage AV
Rise Time, Fall Time
increases at higher frequencies. This is due to the formula: duty cycle=t
the cycle (t
PARAMETER
PARAMETER
Phase Error
c
) decreases as the frequency goes up.
1
1
1,2
1
4
1
1,3
SYMBOL
SYMBOL
freq
t
STAB
d
T
t
R
t
DC
tin
t
skew
DD
DD
c-c
pe
, t
op
, V
, V
f
DD
DD
Input Voltage level: 0-2.50V
from VDD = 2.5V to 1% target frequency
= 2.50V ± 0.20V (unless otherwise stated)
= 2.50V (unless otherwise stated)
100 / 125/ 133/167MHz
101MHz to 267 MHz
66 MHz to 100MHz
Load=120Ω/14pF
CONDITIONS
CONDITIONS
200/267MHz
4
66 MHz
wH
/t
c
, where
MIN
22
40
-150
49.5
MIN
49
TYP
50
TYP
49.4
100
579
48
47
20
50
MAX
340
100
MAX
60
50.5
120
150
100
950
65
75
51
UNITS
MHz
UNITS
µs
%
ps
ps
ps
ps
%
%