SI5324D-C-GM Silicon Laboratories Inc, SI5324D-C-GM Datasheet - Page 23

• Manufacturer Part Number: SI5324D-C-GM
• Description: IC CLOCK MULT 2KHZ-150MHZ 36VQFN
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5324D-C-GM

• Input: *
• Output: *
• Frequency - Max: *
• Voltage - Supply: *
• Operating Temperature: *
• Mounting Type: Surface Mount
• Package / Case: 36-VQFN
• Frequency-max: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Reset value = 0010 1101
Register 6.
Name
Type
5:3
2:0
Bit
Bit
7
6
Reserved
SFOUT2_
SFOUT1_
REG [2:0]
REG [2:0]
Reserved
SLEEP
Name
D7
R
SLEEP
Reserved.
SLEEP.
In sleep mode, all clock outputs are disabled and the maximum amount of internal cir-
cuitry is powered down to reduce power dissipation and noise generation. This bit over-
rides the SFOUTn_REG[2:0] output signal format settings.
0: Normal operation
1: Sleep mode
SFOUT2_REG [2:0].
Controls output signal format and disable for CKOUT2 output buffer. Bypass mode is not
supported for CMOS output clocks.
000: Reserved
001: Disable
010: CMOS
011: Low swing LVDS
100: Reserved
101: LVPECL
110: CML
111: LVDS
SFOUT1_REG [2:0].
Controls output signal format and disable for CKOUT1 output buffer. Bypass mode is not
supported for CMOS output clocks.
000: Reserved
001: Disable
010: CMOS
011: Low swing LVDS
100: Reserved
101: LVPECL
110: CML
111: LVDS
R/W
D6
D5
SFOUT2_REG [2:0]
Preliminary Rev. 0.3
R/W
D4
Function
D3
D2
SFOUT1_REG [2:0]
R/W
D1
Si5324
D0
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