CY29948AC Cypress Semiconductor Corp, CY29948AC Datasheet - Page 2

• Manufacturer Part Number: CY29948AC
• Description: IC CLK BUFF 1:12 200MHZ 32TQFP
• Manufacturer: Cypress Semiconductor Corp
• Type: Fanout Buffer (Distribution), Multiplexerr

Specifications of CY29948AC

• Number Of Circuits: 1
• Ratio - Input:output: 1:12
• Differential - Input:output: Yes/No
• Input: LVCMOS, LVPECL, LVTTL
• Output: LVCMOS, LVTTL
• Frequency - Max: 200MHz
• Voltage - Supply: 2.375 V ~ 3.63 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFP
• Frequency-max: 200MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Pin Description
Output Enable/Disable
The CY29948 features a control input to enable or disable the
outputs. This data is latched on the falling edge of the input clock.
When SYNC_OE is asserted LOW, the outputs are disabled in a
LOW state. When SYNC_OE is set HIGH, the outputs are
enabled as shown in
Note
Document Number: 38-07288 Rev. *D
17, 19, 21, 23,
10, 14, 18, 22,
1. PD = Internal pull-down, PU = Internal pull-up.
25, 27, 29, 31
8, 12, 16, 20,
9, 11, 13, 15,
24, 28, 32
26, 30
Pin
3
4
2
1
5
6
7
SYNC_OE
TCLK
PECL_CLK#
PECL_CLK
TCLK_SEL
SYNC_OE
Q
Q(11:0)
Figure
VDDC
Name
TCLK
[1]
VDD
VSS
TS#
1.
VDDC
PWR
Figure 1. SYNC_OE Timing Diagram
I, PU PECL Input Clock
I, PD PECL Input Clock
I, PU External Reference/Test Clock Input
I, PU Clock Select Input. When LOW, PECL clock is selected. When HIGH
I, PU Output Enable Input. When asserted HIGH, the outputs are enabled.
I, PU Three-state Control Input. When asserted LOW, the output buffers
I/O
O
Clock Outputs
TCLK is selected.
When set LOW the outputs are disabled in a LOW state.
are three-stated. When set HIGH, the output buffers are enabled.
2.5V or 3.3V Power Supply for Output Clock Buffers
2.5V or 3.3V Power Supply
Common Ground
Description
CY29948
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