SY56028XRMG Micrel Inc, SY56028XRMG Datasheet - Page 3

IC MUX CML 4:1 DIFF LV 32MLF

SY56028XRMG

Manufacturer Part Number
SY56028XRMG
Description
IC MUX CML 4:1 DIFF LV 32MLF
Manufacturer
Micrel Inc
Series
Precision Edge®r
Type
Fanout Buffer (Distribution), Multiplexerr
Datasheet

Specifications of SY56028XRMG

Number Of Circuits
1
Ratio - Input:output
4:2
Differential - Input:output
Yes/Yes
Input
CML, LVDS, LVPECL
Output
CML
Frequency - Max
4.5GHz
Voltage - Supply
2.375 V ~ 2.625 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-MLF®, QFN
Frequency-max
4.5GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
576-3699-5
SY56028XRMG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SY56028XRMG
Manufacturer:
Micrel Inc
Quantity:
135
April 2010
Micrel, Inc.
Pin Description
Truth Table
4,8,9,24,28,32
Pin Number
10,13,20,23
EQ Input
FLOAT
SEL1
25,27
29,31
16,17
12,11
22,21
HIGH
LOW
1,3
5,7
26
30
19
15
18
0
0
1
1
2
6
Exposed pad
Pin Name
Equalization FR4 6mil
IN0, /IN0
IN1, /IN1
IN2, /IN2
IN3, /IN3
Q0, /Q0
Q1, /Q1
VCCO
GND,
SEL0
SEL0
SEL1
VCC
VT0
VT1
VT2
VT3
EQ
0
1
0
1
Stripline
18”
27”
9 “
Pin Function
Differential Inputs: Accepts differential signals as small as 200mV (400mV
applied to the input of a 9, 18 or 27 inch 6mil FR4 stripline transmission line. See
“Input and Output Stage” section for details of this input.
Input Termination Center-Tap: Each side of the differential input pair terminates to
the VT pin. This pin provides a center-tap to a termination network for maximum
interface flexibility. An internal high impedance resistor divider biases VT to allow
input AC coupling. For AC coupling, bypass VT with 0.1µF low ESR capacitor to
VCC. See “Input Interface Applications” subsection and Figure 2a.
Three level input for equalization control.
Single-ended TTL/CMOS compatible input selects the inputs to the multiplexer. This
input is internally connected to a 25kΩ pull-up resistor and will default to a logic
HIGH state if left open. Input logic threshold is VCC/2. See “Truth Table” for select
control.
Positive Power Supply: Bypass with 0.1uF//0.01uF low ESR capacitors as close to
the V
Output Supply: Bypass with 0.1uF//0.01uF low ESR capacitors as close to the V
pin as possible. Supplies the output buffers.
Ground: Exposed pad must be connected to a ground plane that is the same
potential as the ground pins.
CML Differential Output Pair: Differential buffered copy of the input signal. The
output swing is typically 390mV. See “Functional Description” subsection for
termination information.
IN0 Input Selected
IN1 Input Selected
IN2 Input Selected
IN3 Input Selected
CC
pin as possible. Supplies the input and core circuitry.
3
hbwhelp@micrel.com
or (408) 955-1690
M9999-040810-A
SY56028XR
PP
)
CCO

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