IDT74FCT38072DCGI IDT, Integrated Device Technology Inc, IDT74FCT38072DCGI Datasheet - Page 4

• Manufacturer Part Number: IDT74FCT38072DCGI
• Description: IC CLOCK DRIVER 1-2 CMOS 8-SOIC
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 74FCTr
• Type: Fanout Buffer (Distribution)r

Specifications of IDT74FCT38072DCGI

• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: No/No
• Input: LVTTL
• Output: LVTTL
• Frequency - Max: 166MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC
• Frequency-max: 166MHz
• Number Of Outputs: 2
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 85C
• Propagation Delay Time: 3ns
• Operating Supply Voltage (min): 3V
• Mounting: Surface Mount
• Pin Count: 8
• Operating Supply Voltage (typ): 3.3V
• Package Type: SOIC N
• Input Frequency: 166MHz
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74FCT38072DCGI

TEST CIRCUITS
TEST CONDITIONS
DEFINITIONS:
C
R
t
TEST WAVEFORMS
OUTPUT
R
IDT74FCT38072
3.3V CMOS 1-TO-2 CLOCK DRIVER
L
T
/ t
OUTPUT
= Load capacitance: includes jig and probe capacitance.
= Termination resistance: should be equal to Z
F
INPUT
Symbol
= Rise/Fall time of the input stimulus from the Pulse Generator.
INPUT
t
R
C
R
R
/ t
L
T
L
F
1 (0V to 3V or 3V to 0V)
Pulse Skew - t
Propagation Delay
t
Z
PLH
t
OUT
PLH
V
CC
t
SK(p)
of pulse generator
t
R
= 3.3V ±0.3V
15
33
= |t
PHL -
SK(P)
OUT
t
PLH
of the Pulse Generator.
t
t
PHL
PHL
|
t
F
0.8V
2.0V
V
3V
1.5V
0V
1.5V
V
Unit
OH
pF
OL
Ω
Ω
ns
3V
1.5V
0V
1.5V
V
V
OH
OL
4
Part-to-Part Skew is for the same package and speed grade.
PACKAGE 1 OUTPUT
PACKAGE 2 OUTPUT
Generator
Pulse
OUTPUT 1
OUTPUT 2
INPUT
INPUT
V
IN
Part-to-Part Skew - t
Output Skew - t
t
C
SK(o)
t
L
SK(PP)
R
= 15pF Circuit
INDUSTRIAL TEMPERATURE RANGE
T
t
= |t
PLH1
t
D.U.T.
t
PLH2
= |t
PLH1
V
t
PLH2 -
SK(o)
CC
t
PLH2
t
PLH2 -
SK(PP)
SK(O)
t
PLH1
SK(PP)
t
R
PLH1
L
|
t
PHL1
or
t
t
t
PHL2
PHL1
SK(o)
|
|t
t
or
PHL2 -
PHL2
t
SK(PP)
V
|t
OUT
PHL2 -
t
PHL1
t
PHL1
V
3V
1.5V
0V
V
1.5V
V
V
1.5V
|
15pF
OL
OL
C
OH
OH
V
V
V
L
3V
1.5V
0V
1.5V
1.5V
|
V
OH
OL
OH
OL