ICS83026BGI-01LF IDT, Integrated Device Technology Inc, ICS83026BGI-01LF Datasheet

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ICS83026BGI-01LF

Manufacturer Part Number
ICS83026BGI-01LF
Description
IC CLK BUFFER 350MHZ 1:1 8-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
HiPerClockS™r
Type
Fanout Buffer (Distribution)r
Datasheet

Specifications of ICS83026BGI-01LF

Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
Yes/No
Input
HCSL, LVDS, LVHSTL, LVPECL, SSTL
Output
LVCMOS, LVTTL
Frequency - Max
350MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP
Frequency-max
350MHz
Number Of Outputs
2
Operating Supply Voltage (max)
3.465V
Operating Temp Range
-40C to 85C
Propagation Delay Time
3.1ns
Operating Supply Voltage (min)
3.135V
Mounting
Surface Mount
Pin Count
8
Operating Supply Voltage (typ)
3.3V
Package Type
TSSOP
Duty Cycle
60%
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
83026BGI-01LF
B
G
The ICS83026I-01 is a low skew, 1-to-2 Differential-to-
LVCMOS/LVTTL Fanout Buffer. The differential input can
accept most differential signal types (LVPECL, LVDS,
LVHSTL, HCSL and SSTL) and translate to two single-
ended LVCMOS/LVTTL outputs. The small 8-lead SOIC
footprint makes this device ideal for use in applications
with limited board space.
83026BMI-01
LOCK
ENERAL
nCLK
CLK
OE
D
IAGRAM
D
ESCRIPTION
Q0
Q1
D
IFFERENTIAL
1
F
P
Two LVCMOS / LVTTL outputs
Differential CLK, nCLK input pair
CLK, nCLK pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
Maximum output frequency: 350MHz
Output skew: 15ps (maximum)
Part-to-part skew: 600ps (maximum)
Additive phase jitter, RMS: 0.03ps (typical)
Small 8 lead SOIC package saves board space
3.3V core, 3.3V, 2.5V or 1.8V output operating supply
-40°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free RoHS
(6) packages
EATURES
IN
-
TO
A
-LVCMOS/LVTTL F
SSIGNMENT
3.8mm x 4.8mm, x 1.47mm package body
4.40mm x 3.0mm x 0.925mm
nCLK
nCLK
CLK
CLK
V
V
ICS83026I-01
OE
ICS83026I-01
OE
DD
DD
8-Lead TSSOP
package body
8-Lead SOIC
G Package
M Package
Top View
Top View
1
2
3
4
1
2
3
4
ICS83026I-01
8
7
6
5
8
7
6
5
L
V
Q0
Q1
GND
OW
V
Q0
Q1
GND
DDO
DDO
ANOUT
S
KEW
REV. A AUGUST 4, 2010
, 1-
B
UFFER
TO
-2

Related parts for ICS83026BGI-01LF

ICS83026BGI-01LF Summary of contents

Page 1

G D ENERAL ESCRIPTION The ICS83026I- low skew, 1-to-2 Differential-to- LVCMOS/LVTTL Fanout Buffer. The differential input can accept most differential signal types (LVPECL, LVDS, LVHSTL, HCSL and SSTL) and translate to two single- ended LVCMOS/LVTTL outputs. The small ...

Page 2

ABLE IN ESCRIPTIONS ...

Page 3

BSOLUTE AXIMUM ATINGS Supply Voltage Inputs Outputs Package Thermal Impedance Lead SOIC 8 Lead TSSOP Storage Temperature, T STG T 3A ABLE OWER UPPLY HARACTERISTICS ...

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T 3D ABLE IFFERENTIAL HARACTERISTICS ...

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T 4B ABLE HARACTERISTICS ...

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The spectral purity in a band at a specific offset from the funda- mental compared to the power of the fundamental is called the dBc Phase Noise. This value is normally expressed using a Phase noise plot and is most ...

Page 7

P ARAMETER 1.65V±5% V DD, V DDO LVCMOS GND -1.65V±5% 3.3VC /3. ORE UTPUT OAD 2.4±0.125V 0.9V±0.45V DDO LVCMOS GND -0.9V±0.45V 3.3VC /1. ORE UTPUT OAD V DDO Qx ...

Page 8

CLK V DDO Q0 ROPAGATION ELAY V DDO Q0 PERIOD t PW odc = t PERIOD UTPUT UTY YCLE ULSE IDTH 83026BMI-01 D ...

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IRING THE IFFERENTIAL NPUT TO Figure 1 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF = V generated by the bias resistors R1, R2 and C1. This bias ...

Page 10

IFFERENTIAL LOCK NPUT NTERFACE The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and other differential signals. Both V SWING V and V input requirements. Figures show PP CMR interface examples for the ...

Page 11

S E CHEMATIC XAMPLE Figure 3 shows an application schematic example of ICS83026I- 01. The ICS83026I-01 CLK/nCLK input can directly accepts various types of differential signal. In this example, the input is driven by an LVDS driver. The ICS83026I-01 outputs ...

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ACKAGE UTLINE UFFIX FOR T 6A ABLE ACKAGE IMENSIONS ...

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ABLE RDERING NFORMATION ...

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...

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We’ve Got Your Timing Solution. 6024 Silver Creek Valley Road San Jose, CA 95138 © 2010 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, the IDT logo, ICS and HiPerClockS are trademarks of ...

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