PI6C182BHE Pericom Semiconductor, PI6C182BHE Datasheet - Page 3

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PI6C182BHE

Manufacturer Part Number
PI6C182BHE
Description
IC 1:10 CLOCK BUFFER 28-SSOP
Manufacturer
Pericom Semiconductor
Type
Fanout Buffer (Distribution)r
Datasheet

Specifications of PI6C182BHE

Number Of Circuits
1
Ratio - Input:output
1:10
Differential - Input:output
No/No
Input
TTL
Output
TTL
Frequency - Max
140MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Frequency-max
140MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
2-Wire I2C Control
The I
output and test mode enable.
The PI6C182B is a slave receiver device. It can not be read back.
Sub addressing is not supported. All preceding bytes must be sent
in order to change one of the control bytes.
Every byte put on the SDATA line must be 8-bits long (MSB
first), followed by an acknowledge bit generated by the receiving
device.
During normal data transfers SDATA changes only when SCLOCK
is LOW. Exceptions: A HIGH to LOW transition on SDATA while
SCLOCK is HIGH indicates a “start” condition. A LOW to HIGH
transition on SDATA while SCLOCK is HIGH is a “stop” condition
and indicates the end of a data transfer cycle.
Each data transfer is initiated with a start condition and ended with
Byte1: SDRAM Active/Inactive Register
(1 = enable, 0 = disable)
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Supply Current
I
I
I
I
DD
DD
DD
DD
Storage Temperature............................................................–65°C to +150°C
Ambient Temperature with Power Applied...........................–40°C to +85°C
3.3V Supply Voltage to Ground Potential ..............................–0.5V to +4.6V
DC Input Voltage....................................................................–0.5V to +4.6V
Bit
7
6
5
4
3
2
1
0
2
Symbol
C interface permits individual enable/disable of each clock
Pin
27
26
23
22
SDRAM7 (Active/Inactive)
SDRAM6 (Active/Inactive)
SDRAM5 (Active/Inactive)
SDRAM4 (Active/Inactive)
NC (Initialize to 0)
NC (Initialize to 0)
NC (Initialize to 0)
NC (Initialize to 0)
Supply Current
(V
DD
= +3.465V, C
Parameter
Description
LOAD
= Max.)
BUF_IN = 0 MHz
BUF_IN = 66.66 MHz
BUF_IN = 100.00 MHz
BUF_IN = 133.00 MHz
Test Condidtion
3
a stop condition. The first byte after a start condition is always a
7-bit address byte followed by a read/write bit. (HIGH = read from
addressed device, LOW = write to addressed device). If the device’s
own address is detected, PI6C182B generates an acknowledge by
pulling SDATA line LOW during ninth clock pulse, then accepts
the following data bytes until another start or stop condition is
detected.
Following acknowledgement of the address byte (D2), two more
bytes must be sent:
1. “Command Code” byte
2. “Byte Count” byte.
Although the data bits on these two bytes are “don’t care,” they
must be sent and acknowledged.
Byte2: Optional Register for Possible Future
Requirements (1 = enable, 0 = disable)
Bit
7
6
5
4
3
2
1
0
Pin
18
11
Note:
Stresses greater than those listed under MAXIMUM RAT-
INGS may cause permanent damage to the device. This is
a stress rating only and functional operation of the device
at these or any other conditions above those indicated in
the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for ex-
tended periods may affect reliability.
SDRAM9 (Active/Inactive)
SDRAM8 (Active/Inactive)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
Min.
Precision 1-10 Clock Buffer
Typ.
Description
Max.
180
240
360
2
PS8465C
PI6C182B
Units
mA
09/07/05

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