NB7L14MNTXG ON Semiconductor, NB7L14MNTXG Datasheet - Page 5

• Manufacturer Part Number: NB7L14MNTXG
• Description: IC FANOUT BUFFER DIFF 16-QFN
• Manufacturer: ON Semiconductor
• Series: GigaComm™r
• Type: Fanout Buffer (Distribution)r

Specifications of NB7L14MNTXG

• Number Of Circuits: 1
• Ratio - Input:output: 1:4
• Differential - Input:output: Yes/Yes
• Input: CML, LVCMOS, LVDS, LVPECL, LVTTL
• Output: LVPECL
• Frequency - Max: 8GHz
• Voltage - Supply: 2.375 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TFQFN Exposed Pad
• Frequency-max: 8GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
11. Measured by forcing V
12. Skew is measured between outputs under identical transitions and conditions @ 0.5 GHz. Duty cycle skew is measured between differential
13. Additive RMS jitter with 50% duty cycle clock signal.
14. Additive peak−to−peak data dependent jitter with input NRZ data at PRBS23.
15. Input and output voltage swing is a single−ended measurement operating in differential mode.
Table 5. AC CHARACTERISTICS
f
f
V
t
t
t
t
t
V
t
t
Symbol
MAX
DATAMAX
PLH
PHL
SKEW
DC
JITTER
r
f
OUTPP
INPP
40 ps (20% − 80%).
outputs using the deviations of the sum of T
,
800
700
600
500
400
300
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
0
(V
Maximum Input Clock Frequency; V
Maximum Operating Data Rate; NRZ, (PRBS23)
Output Voltage Amplitude (Note 15)
(See Figure 9)
Propagation Delay IN to Q
Duty Cycle Skew (Note 12)
Output – Output Within Device Skew
Device to Device Skew
Output Clock Duty Cycle
(Reference Duty Cycle = 50%)
RMS Random Clock Jitter (Note 13)
Peak−to−Peak Data Dependent Jitter (Note 14)
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 15)
Output Rise/Fall Times @ 1.0 GHz
(20% − 80%)
Figure 3. CLOCK Output Voltage Amplitude
OUTPP
1.0
Q AMP (mV)
) vs. Input Frequency (f
f
2.0
in
INPP
, Clock Input Frequency (GHz)
(min) from a 50% duty cycle clock source. All loading with an external R
Temperature (Typ)
3.0
4.0
V
CC
= 2.375 V to 3.6 V, GND = 0 V, TA = −40°C to +85°C ; (Note 11)
Characteristic
5.0
pw
− and T
OUT
in
) at Ambient
6.0
w 400 mV
pw
http://onsemi.com
+ @ 0.5 GHz.
7.0
8.0
5
f
in
f
v 10.7 Gb/s
in
f
f
in
in
f
in
v 5 GHz
v 7 GHz
v 7 GHz
≤ 7 GHz
Qx, Qx
V
IN
IN
T
50 W
50 W
Figure 4. Input Structure
Min
500
400
125
100
10
45
30
L
7
= 50 W to V
V
CC
Typ
720
450
165
0.5
11
50
45
8
3
5
CC
– 2.0 V. Input edge rates
1200
Max
200
0.8
15
15
50
55
15
60
ps pk−pk
ps rms
Gbps
Unit
GHz
mV
mV
ps
ps
ps
%