IDT5991A-7JGI8 IDT, Integrated Device Technology Inc, IDT5991A-7JGI8 Datasheet - Page 5

• Manufacturer Part Number: IDT5991A-7JGI8
• Description: IC CLK DVR PLL FANOUT 32-PLCC
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: TurboClock™r
• Type: PLL Clock Driverr

Specifications of IDT5991A-7JGI8

• Pll: Yes with Bypass
• Input: TTL
• Output: TTL
• Number Of Circuits: 1
• Ratio - Input:output: 1:8
• Differential - Input:output: No/No
• Frequency - Max: 100MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-PLCC
• Frequency-max: 100MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 5991A-7JGI8

INPUT TIMING REQUIREMENTS
NOTE:
1. Where pulse width implied by D
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
NOTES:
1. All timing and jitter tolerances apply for F
2. Skew is the time between the earliest and the latest output transition among all outputs for which the same t
3. t
4. t
5. For IDT5991A-2 t
6. There are 3 classes of outputs: Nominal (multiple of t
7. t
8. t
9. t
10. Measured at 2V.
11. Measured at 0.8V.
IDT5991A
PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK
Symbol Parameter
t
SKEWPR
t
t
t
t
t
t
t
F
t
t
SKEW0
SKEW1
SKEW2
SKEW3
SKEW4
t
t
RPWH
ORISE
OFALL
RPWL
ODCV
t
t
t
LOCK
PWH
PWL
Symbol
NOM
DEV
t
load.
by-4 mode).
measured from the application of a new signal or frequency at REF or FB until t
t
t
PD
SKEWPR
SKEW0
DEV
LOCK
PD
JR
U
t
t
R
PWC
R
D
is measured with REF input rise and fall times (from 0.8V to 2V ) of 1ns.
, t
EF
H
is the output-to-output skew between any two devices operating under the same conditions (V
F
is the time that is required before synchronization is achieved. This specification is valid only after V
is the skew between outputs when they are selected for 0t
is the skew between a pair of outputs (xQ
VCO Frequency Range
REF Pulse Width HIGH
REF Pulse Width LOW
Programmable Skew Time Unit
Zero Output Matched-Pair Skew (xQ
Zero Output Skew (All Outputs)
Output Skew
(Rise-Rise, Fall-Fall, Same Class Outputs)
Output Skew
(Rise-Fall, Nominal-Inverted, Divided-Divided)
Output Skew
(Rise-Rise, Fall-Fall, Different Class Outputs)
Output Skew
(Rise-Fall, Nominal-Divided, Divided-Inverted)
Device-to-Device Skew
REF Input to FB Propagation Delay
Output Duty Cycle Variation from 50%
Output HIGH Time Deviation from 50%
Output LOW Time Deviation from 50%
Output Rise Time
Output Fall Time
PLL Lock Time
Cycle-to-Cycle Output Jitter
Maximum input rise and fall times, 0.8V to 2V
Input clock pulse, HIGH or LOW
Input duty cycle
Reference Clock Input
SKEW0
is measured with C
(8)
(1)
(1)
H
is less than t
(1)
(1,2,7)
(1)
(1)
NOM
(1,4,5)
L
= 0pF; for C
> 25MHz.
(1,9)
PWC
RMS
Peak-to-Peak
0
, xQ
(1,11)
Description
(1)
(1,10)
limit, t
0
and xQ
1
(1,3)
U
)
(1,2,3)
(1,6)
delay), Inverted (4Q
PWC
(1,6)
(1,2)
L
= 30pF, t
1
) when all eight outputs are selected for 0t
limit applies.
(1)
U
−
.
−
Min.
0.15
0.15
SKEW0
—
—
—
—
—
—
—
0.25
—
—
—
—
—
3
3
1.2
= 0.35ns Max.
IDT5991A-2
0
and 4Q
Typ.
0.05
0.25
0.25
0.1
0.5
0.5
—
—
—
—
—
—
—
—
0
0
1
1
PD
5
is within specified limits.
1
only with 4F
Max.
0.25
0.75
0.25
200
0.2
0.5
0.5
0.9
1.2
2.5
1.2
1.2
0.5
—
—
25
1
2
See PLL Programmable Skew Range and Resolution Table
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
0
CC
= 4F
−
−
, ambient temperature, air flow, etc.)
Min.
0.15
0.15
U
—
—
—
—
—
—
—
—
—
—
—
—
3
3
0.5
1.2
.
See Control Summary Table
1
= HIGH), and Divided (3Qx and 4Qx only in Divide-by-2 or Divide-
CC
U
IDT5991A-5
is stable and within normal operating limits. This parameter is
delay has been selected when all are loaded with the specified
Typ.
0.25
0.1
0.6
0.5
0.5
0.5
—
—
—
—
—
—
—
—
0
0
1
1
Min.
3.75
—
10
3
Max.
0.25
1.25
200
0.5
0.7
1.2
0.7
0.5
1.2
2.5
1.5
1.5
0.5
—
—
25
1
3
−
−
Min.
0.15
0.15
—
—
—
—
—
—
—
—
—
—
—
—
3
3
0.7
1.2
Max.
IDT5991A-7
100
10
—
90
Typ.
0.1
0.3
0.6
0.5
0.7
1.2
1.5
1.5
—
—
—
—
—
—
—
—
0
0
Max.
0.25
0.75
1.65
200
1.5
1.2
1.7
0.7
1.2
2.5
2.5
3.5
0.5
—
—
25
1
3
MHz
ns/V
Unit
%
ns
Unit
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps