CY22392FC Cypress Semiconductor Corp, CY22392FC Datasheet

CLOCK SYN FLSH PROG 3PLL 16TSSOP

CY22392FC

Manufacturer Part Number
CY22392FC
Description
CLOCK SYN FLSH PROG 3PLL 16TSSOP
Manufacturer
Cypress Semiconductor Corp
Type
Clock Generator, Fanout Distributionr
Datasheet

Specifications of CY22392FC

Pll
Yes
Input
Crystal
Output
Clock
Number Of Circuits
1
Ratio - Input:output
1:6
Differential - Input:output
No/No
Frequency - Max
200MHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Frequency-max
200MHz
For Use With
428-1918 - KIT DEV FTG PROGRAMMING KIT428-1455 - SOCKET ADAPTER FOR CY2239X
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1389
Features
Benefits
Cypress Semiconductor Corporation
Document #: 38-07013 Rev. *F
Logic Block Diagram
Three Integrated Phase-locked Loops
Ultra Wide Divide Counters (8-bit Q, 11-bit P, and 7-bit Post
Divide)
Improved Linear Crystal Load Capacitors
Flash Programmability
Field Programmable
Low-jitter, High-accuracy Outputs
Power Management Options (Shutdown, OE, Suspend)
Configurable Crystal Drive Strength
Frequency Select through three External LVTTL Inputs
3.3V Operation
16-pin TSSOP Packages
CyClocksRT™ Support
Generates up to three unique frequencies on six outputs up to
200 MHz from an external source. Functional upgrade for
current CY2292 family.
Enables 0 ppm frequency generation and frequency
conversion under the most demanding applications.
SHUTDOWN/OE
S2/SUSPEND
XTALOUT
S0
S1
XTALIN
CONFIGURATION
FLASH
OSC.
198 Champion Court
FLASH Programmable Clock Generator
11 BIT P
11 BIT P
11 BIT P
8 BIT Q
8 BIT Q
8 BIT Q
PLL1
PLL2
PLL3
Improves frequency accuracy over temperature, age, process,
and initial offset.
Nonvolatile programming enables easy customization, fast
turnaround, performance tweaking, design timing margin
testing, inventory control, lower part count, and more secure
product supply. In addition, any part in the family can also be
programmed multiple times, which reduces programming
errors and provides an easy upgrade path for existing designs.
In-house programming of samples and prototype quantities is
available using the CY3672 development kit. Production
quantities are available through Cypress Semiconductor’s
value added distribution partners or by using third party
programmers from BP Microsystems, HiLo Systems, and
others.
Performance suitable for high-end multimedia,
communications, industrial, A/D Converters, and consumer
applications.
Supports numerous low power application schemes and
reduces EMI by enabling unused outputs to be turned off.
Adjusts crystal drive strength for compatibility with virtually all
crystals.
3-bit external frequency select options for PLL1, CLKA, and
CLKB.
Industry-standard supply voltage.
Industry-standard packaging saves on board space.
Easy to use software support for design entry.
Crosspoint
Three-PLL General Purpose
Switch
4x4
San Jose
,
CA 95134-1709
Divider
/2,3, or 4
Divider
Divider
Divider
Divider
7 BIT
7 BIT
7 BIT
7 BIT
Revised July 16, 2009
CY22392
408-943-2600
XBUF
CLKE
CLKD
CLKC
CLKB
CLKA
[+] Feedback

Related parts for CY22392FC

CY22392FC Summary of contents

Page 1

... XTALIN OSC. XTALOUT CONFIGURATION FLASH SHUTDOWN/ S2/SUSPEND Cypress Semiconductor Corporation Document #: 38-07013 Rev. *F Three-PLL General Purpose FLASH Programmable Clock Generator Improves frequency accuracy over temperature, age, process, ■ and initial offset. Nonvolatile programming enables easy customization, fast ■ turnaround, performance tweaking, design timing margin testing, inventory control, lower part count, and more secure product supply ...

Page 2

Pinouts Table 1. Pin Definitions Name Pin Number CLKC AGND 3 XTALIN 4 XTALOUT 5 XBUF 6 CLKD 7 CLKE 8 CLKB 9 CLKA 10 GND S2/SUSPEND 15 ...

Page 3

Operation The CY22392 is an upgrade to the existing CY2292. The new device has a wider frequency range, greater flexibility, improved performance, and incorporates many features that reduce PLL sensitivity to external system issues. The device has three PLLs which, ...

Page 4

Improving Jitter Jitter Optimization Control is useful in mitigating problems related to similar clocks switching at the same moment, causing excess jitter. If one PLL is driving more than one output, the negative phase of the PLL can be selected ...

Page 5

Electrical Characteristics Parameter Description [3] I Output High Current OH [3] I Output Low Current OL C Crystal Load Capacitance XTAL_MIN C Crystal Load Capacitance XTAL_MAX [3] C Input Pin Capacitance LOAD_IN V High Level Input Voltage IH V Low ...

Page 6

Switching Waveforms Figure 2. All Outputs, Duty Cycle, and Rise/Fall Time OUTPUT ALL THREE-STATE OUTPUTS CLK OUTPUT SELECT OUTPUT Test Circuit Document #: 38-07013 Rev Figure ...

Page 7

... Ordering Information Ordering Code Package Name [8] CY22392FC Z16 [7, 8] Z16 CY22392ZC-xxx [7, 8] CY22392ZC-xxxT Z16 [7, 8] Z16 CY22392ZI-xxx [7, 8] CY22392ZI-xxxT Z16 CY3672-USB CY3698 Pb Free ZZ16 CY22392FXC ZZ16 CY22392FXCT ZZ16 CY22392FXI ZZ16 CY22392FXIT [7] ZZ16 CY22392ZXC-xxx [7] ZZ16 CY22392ZXC-xxxT [7] ZZ16 CY22392ZXI-xxx [7] ZZ16 CY22392ZXI-xxxT Notes 7. The CY22392ZC-xxx, CY22392ZI-xxx, CY22392ZXC-xxx, and CY22392ZXI-xxx are factory programmed configurations. Factory programming is available for high-volume design opportunities of 100 Ku/year or more in production ...

Page 8

Package Diagram 1 4.30[0.169] 4.50[0.177] 16 0.65[0.025] BSC. 0.19[0.007] 0.30[0.012] 0.05[0.002] 0.85[0.033] 0.15[0.006] 0.95[0.037] 4.90[0.193] 5.10[0.200] Document #: 38-07013 Rev. *F Figure 6. 16-Pin TSSOP 4.40 MM Body PIN 1 ID DIMENSIONS IN MM[INCHES] MIN. REFERENCE JEDEC MO-153 6.25[0.246] PACKAGE ...

Page 9

... Removed part number CY22392FI in ordering information table. Changed Lead-Free to Pb-Free. Added Electrical Characteristics table which was accidentally dropped in rev *E Ordering Information table: changed package name for Pb-free devices from Z16 to ZZ16; removed part number CY22392FCT psoc.cypress.com clocks.cypress.com image.cypress.com Revised July 16, 2009 CY22392 max to 300 ns ...

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