SI5321-F-BC Silicon Laboratories Inc, SI5321-F-BC Datasheet - Page 6

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SI5321-F-BC

Manufacturer Part Number
SI5321-F-BC
Description
IC PREC CLOCK MULTIPLIER 63CBGA
Manufacturer
Silicon Laboratories Inc
Type
Clock Multiplierr
Datasheet

Specifications of SI5321-F-BC

Package / Case
63-CBGA
Pll
Yes
Input
LVTTL
Output
CML
Number Of Circuits
1
Ratio - Input:output
1:1
Differential - Input:output
Yes/Yes
Frequency - Max
2.8GHz
Divider/multiplier
Yes/Yes
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Frequency-max
2.4GHz
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 20 C
Mounting Style
SMD/SMT
Supply Current
141 mA
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
336-1143

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI5321-F-BC
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Si5321
6
Table 2. DC Characteristics, V
(V
Parameter
Supply Current 1
Supply Current 2
Power Dissipation Using 3.3 V Supply
Clock Output
Common Mode Input Voltage
(CLKIN)
Single-Ended Input Voltage
(CLKIN)
Differential Input Voltage Swing
(CLKIN)
Input Impedance
(CLKIN+, CLKIN–)
Differential Output Voltage Swing
(CLKOUT)
Output Common Mode Voltage
(CLKOUT)
Output Short to GND (CLKOUT)
Output Short to V
Input Voltage Low (LVTTL Inputs)
Input Voltage High (LVTTL Inputs)
Input Low Current (LVTTL Inputs)
Input High Current (LVTTL Inputs)
Internal Pulldowns (LVTTL Inputs)
Input Impedance (LVTTL Inputs)
Output Voltage Low (LVTTL Outputs)
Output Voltage High (LVTTL Outputs)
Notes:
DD33
1. The Si5321 device provides weak 1.5 V internal biasing that enables ac-coupled operation.
2. Clock inputs may be driven differentially or single-endedly. When driven single-endedly, the unused input should be ac-
3. Transmission line termination, when required, must be provided externally.
4. Although the Si5321 device can operate with input clock swings as high as 1500 mV
= 3.3 V ±5%, T
coupled to ground.
maintaining the input clock amplitude below 500 mV
DD25
A
= –20 to 85 °C)
(CLKOUT)
2,3,4
1,2,3
2,3,4
DD
= 3.3 V
Symbol
V
I
I
V
V
SC(+)
V
SC(–)
V
V
R
V
R
I
I
V
V
P
OCM
I
I
DD
DD
I
ICM
pd
PP
OD
IH
OH
IL
OL
IS
ID
IH
IN
IL
IN
D
Rev. 2.3
for optimal performance.
622.08 MHz Out
622.08 MHz Out
Test Condition
622.08 MHz In,
19.44 MHz Out
See Figure 1A
See Figure 1B
19.44 MHz In,
19.44 MHz In,
100 Ω Load
Line-to-Line
100 Ω Load
Line-to-Line
I
I
O
O
= 0.5 mA
= 0.5 mA
Min
200
200
750
–60
PP
1.0
1.4
2.0
2.0
50
, Silicon Laboratories recommends
Typ
141
135
445
825
1.5
1.8
80
15
500
500
1100
Max
155
145
479
2.0
2.2
0.8
0.4
50
50
50
4
4
mV
mV
mV
Unit
mW
mA
mA
mA
mA
k Ω
µ A
µ A
µ A
k Ω
V
V
V
V
V
V
PP
PP
PP

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