MAXQ3183-RAN+ Maxim Integrated Products, MAXQ3183-RAN+ Datasheet - Page 58

• Manufacturer Part Number: MAXQ3183-RAN+
• Description: IC AFE POLYPHASE MULTI 28TSSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAXQ3183-RAN+

• Number Of Channels: 8
• Power (watts): 140mW
• Voltage - Supply, Analog: 3.6V
• Voltage - Supply, Digital: 3.6V
• Package / Case: 28-TSSOP
• For Use With: MAXQ3183-KIT - KIT EV REFRNC DSIGN FOR MAXQ3183
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Bits: -
• Other names: 90-M3183+RAN

Low-Power, Multifunction, Polyphase AFE
with Harmonics and Tamper Detect
negative (for a capacitive load). These values are sepa-
rately accumulated. This means that during any one
DSP cycle, only positive or negative reactive energy will
be accumulated.
Similarly, for real energy, the result accumulated during
any DSP cycle can be positive (that is, energy is deliv-
ered to the load) or negative (that is, energy is driven
back into the line). As is performed for reactive energy,
these values are separately accumulated.
Apparent energy is also accumulated, but since this
value is always positive or zero, there is only one
apparent energy accumulator.
From time to time, the accumulators generate an over-
flow. When this occurs, the appropriate bit is set in the
overflow status register X.EOVER.
When an overflow occurs, supervisory code running on
the host processor must make the appropriate adjust-
ments in the reported energy. In many cases, this could
simply involve incrementing an overflow counter. The
host processor must then clear the overflow indication.
The MAXQ3183 monitors the voltage signal on each
phase for zero-crossing events. If no ascending zero
crossings are detected within a DSP cycle, the NOZXF
(X.FLAGS) flag is set by the MAXQ3183 to notify the
master of this condition. If the NOZXM bit is set, this
flag sets the NOZX bit in the IRQ_FLAG. If the interrupt
enable bit ENOZX is set to 1, the interrupt signal IRQ is
driven low by the MAXQ3183 whenever NOZX = 1. The
master can clear NOZXF and NOZX back to 0 to
remove the interrupt condition.
Figure 12. Apparent and Reactive Energy Calculations
58
______________________________________________________________________________________
No-Zero-Crossing Detection
E_RAW
E_RAW
REACTIVE
RAW_V
RAW_I
REAL
X × Y
X
X
2
2
+ Y
- Y
2
2
APPSEL
APPSEL
Phase sequence status bits PHSEQV and PHSEQI indi-
cate the order in which zero crossings are detected.
When a zero-crossing event occurs on the phase A sig-
nal, followed by phase B, phase C, and then phase A
again, this bit cleared. If a zero crossing on phase A is
then followed by a zero crossing on phase C, then
phase B, this bit set to 1.
For each of the three phases, the MAXQ3183 calcu-
lates RMS voltage and RMS current values, as well as
determines active and reactive energy, using a line-
cycle-based integration process.
The power, energy, and RMS calculation process con-
sists of two tasks: continuous accumulation and post-
processing triggered every CYCNT line cycles. The
accumulation task accumulates raw data obtained
from the AFE during CYCNT line cycles. This task is
performed continuously in the background by the
MAXQ3183. When a CYCNT line cycles accumulation
stage has completed, which is determined by a dedi-
cated frame counter exceeding the NS level, the raw
integral accumulator values are saved for postprocess-
ing and cleared, beginning the next cycle of accumu-
lation task. Then, the DSP postprocessing is triggered
to process saved integrals and calculate energy,
power, etc., values. Note that the background accumu-
lation task continues while foreground postprocessing
RMS Voltage, RMS Current, and Energy
E_GAIN
E_GAIN
Power Calculation (Active, Reactive,
AVERAGE
AVERAGE
AVG_C
AVG_C
Phase Sequence Status
E
E
APPARENT
REACTIVE
Calculation
Apparent)