MCP3202-BI/SN Microchip Technology, MCP3202-BI/SN Datasheet - Page 15

• Manufacturer Part Number: MCP3202-BI/SN
• Description: IC ADC 12BIT 2.7V 2CH SPI 8-SOIC
• Manufacturer: Microchip Technology

Specifications of MCP3202-BI/SN

• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Number Of Bits: 12
• Sampling Rate (per Second): 100k
• Data Interface: Serial, SPI™
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Architecture: SAR
• Conversion Rate: 100 KSPs
• Resolution: 12 bit
• Input Type: Voltage
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

4.0
The MCP3202 A/D Converter employs a conventional
SAR architecture. With this architecture, a sample is
acquired on an internal sample/hold capacitor for
1.5 clock cycles starting on the second rising edge of
the serial clock after the start bit has been received.
Following this sample time, the input switch of the
converter opens and the device uses the collected
charge on the internal sample and hold capacitor to
produce a serial 12-bit digital output code. Conversion
rates of 100 ksps are possible on the MCP3202.
See Section 6.2
Speed” for information on minimum clock rates.
Communication with the device is done using a 3-wire
SPI-compatible interface.
4.1
The MCP3202 device offers the choice of using the
analog input channels configured as two single-
ended inputs or a single pseudo-differential input.
Configuration is done as part of the serial command
before each conversion begins. When used in the
pseudo-differential
programmed as the IN+ and IN– inputs as part of the
command
The IN+ input can range from IN– to V
The IN– input is limited to ±100 mV from the V
The IN– input can be used to cancel small signal com-
mon-mode noise which is present on both the IN+ and
IN– inputs.
For the A/D Converter to meet specification, the charge
holding capacitor (C
time to acquire a 12-bit accurate voltage level during
the 1.5 clock cycle sampling period. The analog input
model is shown in
In this diagram, it is shown that the source impedance
(R
impedance, directly affecting the time that is required to
charge the capacitor, C
source impedances increase the offset, gain, and
integral linearity errors of the conversion.
Ideally, the impedance of the signal source should be
near zero. This is achievable with an operational
amplifier such as the MCP601 which has a closed loop
output impedance of tens of ohms. The adverse affects
of higher source impedances are shown in
When operating in the pseudo-differential mode, if the
voltage level of IN+ is equal to or less than IN–, the
resultant code will be 000h. If the voltage at IN+ is equal
to or greater than {[V
output code will be FFFh. If the voltage level at IN– is
more than 1 LSB below V
the IN+ input will have to go below V
output code. Conversely, if IN- is more than 1 LSB
above V
the IN+ input level goes above V
© 2008 Microchip Technology Inc.
S
) adds to the internal sampling switch (R
SS
DEVICE OPERATION
Analog Inputs
, then the FFFh code will not be seen unless
string
Figure
“Maintaining
SAMPLE
mode,
transmitted
DD
SAMPLE
4-1.
+ (IN–)] – 1 LSB}, then the
SS
) must be given enough
, then the voltage level at
CH0
. Consequently, larger
DD
Minimum
to
SS
level.
and
REF
to see the 000h
the
(V
Figure
CH1
DD
device.
+ IN–).
SS
Clock
4-2.
rail.
are
SS
)
4.2
The digital output code produced by an A/D Converter
is a function of the input signal and the reference
voltage. For the MCP3202, V
reference voltage. As the V
size is reduced accordingly. The theoretical digital
output code produced by the A/D Converter is shown
below.
EQUATION 4-1:
where:
V
V
DD
IN
Digital Output Code
Digital Output Code
=
=
analog input voltage
supply voltage
DD
MCP3202
level is reduced, the LSB
=
4096•V
---------------------- -
DD
V
DD
DS21034E-page 15
is used as the
IN