KAD5512P-12Q72 Intersil, KAD5512P-12Q72 Datasheet - Page 14

• Manufacturer Part Number: KAD5512P-12Q72
• Description: IC ADC 12BIT 125MSPS SGL 72-QFN
• Manufacturer: Intersil
• Series: FemtoCharge™r

Specifications of KAD5512P-12Q72

• Number Of Bits: 12
• Sampling Rate (per Second): 125M
• Data Interface: Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 235mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 72-VFQFN Exposed Pad
• For Use With: KDC5512EVAL - DAUGHTER CARD FOR KAD5512
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Switching Specifications
NOTES:
10. The Tri-Level Inputs internal switching thresholds are approximately 0.43V and 1.34V. It is advised to float the inputs, tie to
11. The input clock to output clock delay is a function of sample rate, using the output clock to latch the data simplifies data
12. SPI Interface timing is directly proportional to the ADC sample period (4ns at 250Msps).
13. The SPI may operate asynchronously with respect to the ADC sample clock.
14. The CSB setup time increases in sleep mode due to the reduced power state, CSB setup time in Nap mode is equal to normal
ADC OUTPUT
Aperture Delay
RMS Aperture Jitter
Output Clock to Data Propagation
Delay, LVDS Mode (Note 11)
Output Clock to Data Propagation
Delay, CMOS Mode (Note 11)
Latency (Pipeline Delay)
Overvoltage Recovery
SPI INTERFACE (Notes 12, 13)
SCLK Period
SCLK Duty Cycle (t
CSB↓ to SCLK↑ Setup Time
CSB↑ after SCLK↑ Hold Time
Data Valid to SCLK↑ Setup Time
Data Valid after SCLK↑ Hold Time
Data Valid after SCLK↓ Time
Data Invalid after SCLK↑ Time
Sleep Mode CSB↓ to SCLK↑ Setup
Time (Note 14)
ground or AVDD depending on desired function.
capture for most applications. Contact factory for more info if needed.
mode CSB setup time (4ns min).
PARAMETER
HI
/t
CLK
or t
14
LO
/t
CLK)
DDR Rising Edge
DDR Falling Edge
SDR Falling Edge
DDR Rising Edge
DDR Falling Edge
SDR Falling Edge
Write Operation
Read Operation
Read or Write
Read or Write
Read or Write
Write
Write
Read
Read
Read or Write in Sleep Mode
CONDITION
KAD5512P
SYMBOL
t
t
t
t
t
t
t
DHW
t
t
DSW
t
t
t
t
DHR
OVR
DVR
CLK
CLK
t
t
t
t
j
DC
DC
DC
DC
DC
DC
L
A
H
A
S
S
MIN
-260
-160
-260
-220
-310
-310
150
16
66
25
1
3
1
3
3
TYP
375
-50
-40
-10
-90
-50
7.5
60
10
50
1
MAX
16.5
120
230
230
200
110
200
75
October 1, 2010
(Note 12)
UNITS
cycles
cycles
cycles
cycles
cycles
cycles
cycles
cycles
cycles
cycles
FN6807.4
µs
ps
ps
ps
ps
ps
ps
ps
%
fs