MAX1409CAP+ Maxim Integrated Products, MAX1409CAP+ Datasheet - Page 32

• Manufacturer Part Number: MAX1409CAP+
• Description: IC DAS 16BIT LP 20-SSOP
• Manufacturer: Maxim Integrated Products
• Type: Data Acquisition System (DAS)r

Specifications of MAX1409CAP+

• Resolution (bits): 16 b
• Sampling Rate (per Second): 60
• Data Interface: Serial
• Voltage Supply Source: Analog and Digital
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WE: Write Enable bit. WE must be set to “1” before any
write operation to the clock and the alarm register. A
logic 0 disables write operations to the clock and alarm
registers, including the AE bit. The WE signal takes
effect after the 8th SCLK rising edge for an 8-bit write.
AE: Alarm Enable bit. A logic 0 disables the alarm func-
tion. When AE equals “1”, the ALIRQ bit in the Al_Status
register will be set to 1 whenever the current time
matches that of the alarm registers.
The RTC_Sec, RTC_Min, RTC_Hour, RTC_Date,
RTC_Month, RTC_Day, RTC_Year, and RTC_Century
registers can be accessed one register at a time or in
Burst mode (see RTC_BURST REGISTER section). The
RTC runs continuously and does not stop for read or
write operations. To prevent the data from changing
during a read operation, complete all read operations
on the RTC registers (single register reads and burst
reads) in less than 1ms.
Using single reads to read all the RTC registers could
lead to errors as much as a century. Since the registers
are updated between read operations, the register con-
tents may change before all RTC registers have been
read, when reading one register at a time. The most
accurate way to get the time information of the RTC
registers is with a burst read. In the burst read, a snap-
shot of the eight RTC registers (RTC_Sec, RTC_Min,
RTC_Hour, RTC_Date, RTC_Month, RTC_Day,
RTC_Year, RTC_Century) is taken once and read
Low-Power, 16-Bit Multichannel DAS with
Internal Reference,10-Bit DACs, and RTC
CH: Clock Halt bit. Writing a “1” to CH disables the
real-time clock and oscillator.
10SEC[2:0]: These are the 10 second bits (10–50 sec-
onds) of the RTC.
32
NAME
DEFAULT
NAME
DEFAULT
______________________________________________________________________________________
FIRST BIT (MSB)
FIRST BIT (MSB)
CH
WE
0
0
10SEC2
Real-Time Clock (RTC)
—
0
0
10SEC1
—
0
0
10SEC0
—
0
0
sequentially with the MSB of the Seconds register first.
They must all be read out as a group of eight registers
of eight bits each, for proper execution of the burst
read function. The worst-case error that can occur
between the “actual” time and the “reported” time is
one second. As with a read operation, using single
writes to update the RTC can lead to collisions. To
guarantee an accurate update of the RTC, use the
Burst Write mode (see Alarm and RTC Programming
section).
The RTC defaults to 24-hr mode, 00:00:00, Sunday,
January 01, 1970 during power-up. January 01, 1970
falls on a Thursday, but since this RTC is not time-
based, the default values do not have an impact on the
functionality of the clock, and they merely provide some
means for testing. If the alarm or RTC registers are pro-
grammed to some unused states, the device chooses
the default values.
Writing to this address begins the burst mode transfer.
In this mode, all the real-time clock registers are contin-
uously read or written starting with Bit 7 of the
RTC_Sec,
RTC_Month, RTC_Day, RTC_Year, and RTC_Century
registers. When reading, the contents of DIN will be
ignored and each register’s 8-bit data will be clocked
out at DOUT on the falling edge of SCLK (total of 64
clock cycles). When writing, start with the Seconds’
register MSB first and continue through the Century
register (see Alarm and RTC Programming section).
SEC[3:0]: These are the second bits (0–9 seconds) of
the RTC.
SEC3
—
0
0
ALARM/CLOCK_CTRL REGISTER (01110)
RTC_Min,
SEC2
RTC_BURST REGISTER (01111)
—
0
0
RTC_SEC REGISTER (10000)
RTC_Hour,
SEC1
—
0
0
RTC_Date,
(LSB)
(LSB)
SEC0
AE
0
0