LTC1297DCN8#PBF Linear Technology, LTC1297DCN8#PBF Datasheet - Page 13

IC DATA ACQ SYSTEM 12BIT 8-DIP

LTC1297DCN8#PBF

Manufacturer Part Number
LTC1297DCN8#PBF
Description
IC DATA ACQ SYSTEM 12BIT 8-DIP
Manufacturer
Linear Technology
Type
Data Acquisition System (DAS)r
Datasheet

Specifications of LTC1297DCN8#PBF

Resolution (bits)
12 b
Sampling Rate (per Second)
60k
Data Interface
Serial, Parallel
Voltage Supply Source
Single Supply
Voltage - Supply
5V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Company:
Part Number:
LTC1297DCN8#PBFLTC1297DCN8
Manufacturer:
LT
Quantity:
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Company:
Part Number:
LTC1297DCN8#PBF
Manufacturer:
Linear Technology
Quantity:
135
A
use a PC board. The ground pin (Pin 4) should be tied
directly to the ground plane with minimum lead length (a
low profile socket is fine). Figure 7 shows an example of
an ideal LTC1292/LTC1297 ground plane design for a two-
sided board. Of course this much ground plane will not
always be possible, but users should strive to get as close
to this ideal as possible.
Bypassing
For good performance, V
ripple. Any changes in the V
ground during a conversion cycle can induce errors or
noise in the output code. V
below 0.5mV by bypassing the V
analog ground plane with a minimum of 22 F tantalum
capacitor and with leads as short as possible. The lead
from the device to the V
Figure 6. Several LTC1292/LTC1297s Sharing One 2-Wire Serial Interface
PPLICATI
OUTPUT PORT
2
SERIAL DATA
MPU
1
0
Figure 8. Poor V
Ripple Can Cause A/D Errors
O
2
2
LTC1292
LTC1297
+
U
HORIZONTAL: 10 s/DIV
S
CC
CS
CC
I FOR ATIO
CC
CC
supply also should be kept to a
U
Bypassing. Noise and
noise and ripple can be kept
2
must be free of noise and
CC
LTC1292
LTC1297
+
voltage with respect to
CC
CS
W
pin directly to the
2
LTC1292
LTC1297
+
CS
U
2-WIRE SERIAL
INTERFACE TO OTHER
PERIPHERALS OR
LTC1292/LTC1297s
minimum and the V
impedance such as obtained from a voltage regulator
(e.g., LT323A). For high frequency bypassing a 0.1 F
ceramic disk placed in parallel with the 22 F is
recommended. Again the leads should be kept to a
minimum. Figures 8 and 9 show the effects of good and
poor V
Analog Inputs
Because of the capacitive redistribution A/D conversion
techniques used, the analog inputs of the LTC1292/
LTC1297 have capacitive switching input current spikes.
These current spikes settle quickly and do not cause a
problem. If large source resistances are used or if slow
settling op amps drive the inputs, take care to insure that
the transients caused by the current spikes settle completely
before the conversion begins.
LTC1292/7 F06
CC
bypassing.
Figure 9. Good V
Noise and Ripple on V
Figure 7. Example Ground Plane
for the LTC1292/LTC1297
HORIZONTAL: 10 s/DIV
CC
1
TANTALUM
3
4
2
supply should have a low output
LTC1292/LTC1297
LTC1292
LTC1297
CC
22 F
Bypassing Keeps
CC
8
6
5
7
Below 1mV
V
CC
0.1 F
LTC1292/7 F07
CS
V
CC
13
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