MCP4641-503E/ST Microchip Technology, MCP4641-503E/ST Datasheet - Page 69

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MCP4641-503E/ST

Manufacturer Part Number
MCP4641-503E/ST
Description
IC DGTL POT 50K 256TAPS 14-TSSOP
Manufacturer
Microchip Technology
Datasheet

Specifications of MCP4641-503E/ST

Package / Case
14-TSSOP
Taps
129
Resistance (ohms)
50K
Number Of Circuits
2
Temperature Coefficient
150 ppm/°C Typical
Memory Type
Non-Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Resistance In Ohms
50K
Number Of Pots
Dual
Taps Per Pot
128
Resistance
50 KOhms
Wiper Memory
Non Volatile
Digital Interface
Serial (2-Wire, I2C)
Operating Supply Voltage
2.5 V, 3.3 V, 5 V
Supply Current
2.5 uA
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP4641-503E/ST
Manufacturer:
MICROCHIP
Quantity:
12 000
8.4
The use of the General Call Address Increment, Decre-
ment, or Write commands is analogous to the “Load”
feature (LDAC pin) on some DACs (such as the
MCP4921). This allows all the devices to “Update” the
output level “at the same time”.
For some applications, the ability to update the wiper
values “at the same time may be a requirement, since
they delay from writing to one wiper value and then the
next may cause application issues. A possible example
would be a “tuned” circuit that uses several MCP45XX/
46XX in rheostat configuration. As the system condition
changes (temperature, load, ...) these devices need to
be changed (incremented/decremented) to adjust for
the system change. These changes will either be in the
same direction or in opposite directions. With the
Potentiometer device the customer can either select
the PxB terminals (same direction) or the PxA
terminal(s) (opposite direction).
Figure 8-6
6*T
1*T
FIGURE 8-6:
Updates.
© 2008 Microchip Technology Inc.
Note:
I2CDLY
I2CDLY
T
I2CDLY
Normal Operation
General Call Operation
Using the General Call Command
time in “General Call” operation.
shows that the update of six devices takes
time in “normal” operation, but only
The application system may need to
partition the I
ensure that the MCP45XX/46XX General
Call commands do not conflict with the
General Call commands that the other I
devices may have defined. Also if only a
portion of the MCP45XX/46XX devices are
to require this synchronous operation,
then the devices that should not receive
these commands should be on the second
I
2
C bus.
= Time from one I
T
T
I2CDLY
I2CDLY
INC
POTs 01-06
Example Comparison of “Normal Operation” vs. “General Call Operation” wiper
INC
POT01
2
C bus into multiple busses to
T
T
I2CDLY
I2CDLY
2
C command completed to completing the next I
INC
POTs 01-06
INC
POT02
T
T
I2CDLY
I2CDLY
MCP454X/456X/464X/466X
INC
POTs 01-06
2
C
INC
POT03
T
T
I2CDLY
I2CDLY
Figure 8-5
cases, the single I
adequate. For applications that do not want all the
MCP45XX/46XX devices to do General Call support or
have a conflict with General Call commands, the
multiple I
FIGURE 8-5:
Configurations.
INC
POTs 01-06
Multiple I
Single I
Controller
Controller
INC
POT04
Host
Host
Bus n
Bus b
2
T
T
C bus configuration would be used.
2
I2CDLY
I2CDLY
shows two I
C Bus Configuration
2
C Bus Configuration
Bus a
Device 1b
Device 1n
Device 1a
2
INC
POTs 01-06
Device 1
C command.
Device 2n
INC
POT05
Device 2a
Device 2b
Device 2
2
Typical Application I
C bus configuration will be
2
T
T
C bus configurations. In many
I2CDLY
I2CDLY
Device 3n
Device 3a
Device 3b
Device 3
INC
POTs 01-06
Device 4b
Device 4n
Device 4a
Device 4
INC
POT06
DS22107A-page 69
Device nb
Device nn
Device na
Device n
2
C Bus

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