SX1239IMLTRT Semtech, SX1239IMLTRT Datasheet - Page 8

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SX1239IMLTRT

Manufacturer Part Number
SX1239IMLTRT
Description
IC, RF RECEIVER, 1.02GHz, QFN-24
Manufacturer
Semtech
Datasheet

Specifications of SX1239IMLTRT

Applications
Wireless Sensor Networks, Automated Meter Reading, Home And Building Automation
Receiving Current
16mA
Data Rate
300Kbps
Modulation Type
FSK, OOK
Sensitivity Dbm
-120dBm
Rohs Compliant
Yes
Rf Ic Case Style
QFN
No. Of Pins
24
Sensitivity (dbm)
-120dBm
Supply Voltage Range
1.8V To 3.6V
Operating Temperature Range
-40°C To +85°C
Lead Free Status / Rohs Status
Supplier Unconfirmed
This product datasheet contains a detailed description of the SX1239 performance and functionality. Please consult the
Semtech website for the latest updates or errata.
Refer to section 9 of this document to identify chip revisions.
1. General Description
The SX1239 is a single-chip integrated circuit ideally suited for today's high performance ISM band RF applications. The
SX1239's advanced features set, including state of the art packet engine greatly simplifies system design whilst the high
level of integration reduces the external BOM to a handful of passive decoupling and matching components. It is intended
for use as high-performance, low-cost FSK and OOK RF receiver for robust frequency agile RF links, and where stable
and constant RF performance is required over the full operating range of the device down to 1.8V.
The SX1239 is intended for applications over a wide frequency range, including the 433 MHz and 868 MHz European and
the 902-928 MHz North American ISM bands. Coupled with a very aggressive sensitivity, the advanced system features of
the SX1239 include a 66 byte RX FIFO, configurable automatic packet handler, listen mode, temperature sensor and
configurable DIOs which greatly enhance system flexibility whilst at the same time significantly reducing MCU
requirements.
The SX1239 complies with both ETSI and FCC regulatory requirements and is available in a 5 x 5 mm QFN 24 lead
package
1.1. Simplified Block Diagram
Rev 3 - Jan 2011
ADVANCED COMMUNICATIONS & SENSING
RFIN
NC
NC
NC
LNA
VBAT1&2
Frequency Synthesis
Receiver Blocks
Power Distribution System
Differential
Single to
VR_ANA
Inductor
Loop
Filter
Tank
Figure 1. Block Diagram
Frac-N PLL
Synthesizer
Division by
2, 4 or 6
32 MHz
Mixers
XTAL
XO
VR_DIG
Page 8
Control Blocks
Modulators
Σ/Δ
RSSI
GND
Oscillator
RC
AFC
Primarily Digital
Primarily Analog
DIO0
DIO1
DIO2
DIO3
DIO4
DIO5
RESET
SPI
GND
DATASHEET
www.semtech.com
SX1239

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