ISL6617CRZ Intersil, ISL6617CRZ Datasheet - Page 10

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ISL6617CRZ

Manufacturer Part Number
ISL6617CRZ
Description
Phase Splitter, Commercial, 10LD 3X3 DFN
Manufacturer
Intersil
Datasheet
The ISL6617 can further be cascaded with itself or
ISL6611A (phase doubler with integrated 5V drivers), as
shown in Figure 8. This can quadruple the number of
phase each PWM line can support. Figure 9 shows the
operational waveforms of the cascaded doublers. The
PWMIN pin will be pulled to VCC when the doubler is
disabled (EN_x = Low). To avoid driving the PWM outputs
of the 1st stage ISL6617 by the 2nd stage’s PWMIN, the
2nd stage doubler’s enable input should remain high, i.e,
tied to VCC, as shown in Figure 8.
To operate each phase at the switching frequency of F
the operational frequency of the controller needs to be
scaled accordingly for different modes, as shown in
Table 2.
FIGURE 7. CONFIGURATION FOR TRANSITION BETWEEN SYNCHRONOUS AND INTERLEAVING #2 MODES
SYNC
28.5%*R
19%*R
52.5%*R
PWM1
10
FIGURE 8. CASCADED PHASE DOUBLER SIMPLIFIED DIAGRAM
PWMIN
IOUT
ISL6617
EN_PH_ SYNC
VCC
PWMA
ISENA
PWMB
ISENB
VCC
VCC
PWMB
PWMA
ISL6617/ISL6611A
ISL6617/ISL6611A
TTL
EN_X
PWMIN
IOUT
PWMIN
IOUT
EN_X
ISL6617
ISL6617
SW
ISL6617
,
+
-
+
-
+
+
-
-
PWMA
ISENA
PWMB
ISENB
PWMA
ISENA
PWMB
ISENB
OPERATIONAL
PWM1A
PWM1B
PWM1C
PWM1D
TABLE 2. CONTROLLER FREQUENCY AND MAXIMUM
Synchronous
Interleaving
Interleaving
Cascaded
MODES
0ns TO 70ns
SYNC
EN_PH
INTERLEAVING
0ns TO 70ns
F
BLANKING
4 CYCLES
CONTROLLER
PHASE1D
PHASE1A
PHASE1B
PHASE1C
2 x F
4 x Fsw
F
DUTY CYCLE
SW
SW
+120+(0ns TO 70ns)
INTERLEAVING
VOUT
DUTY CYCLE
PER PHASE
MAXIMUM
ISL6617
100%
50%
25%
February 4, 2010
ISL6336G
22.5%
D
WITH
45%
90%
MAX
FN7564.0

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