PIC18F67K90-I/MR Microchip Technology, PIC18F67K90-I/MR Datasheet - Page 167
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PIC18F67K90-I/MR
Manufacturer Part Number
PIC18F67K90-I/MR
Description
128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, LCD 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F66K90-IMR.pdf
(570 pages)
Specifications of PIC18F67K90-I/MR
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F67K90-I/MR
Manufacturer:
MICROCHIP
Quantity:
3 000
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TABLE 11-7:
2009-2011 Microchip Technology Inc.
RD0/SEG0/
CTPLS
RD1/SEG1/
T5CKI/T7G
RD2/SEG2
RD3/SEG3
RD4/SEG4/
SDO2
RD5/SEG5/
SDI2/SDA2
RD6/SEG6/
SCK2/SCL2
RD7/SEG7/
SS2
Legend:
Pin Name
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
I
2
C = I
2
Function
PORTD FUNCTIONS
C Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
CTPLS
T5CKI
SDO2
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SDA2
SEG6
SCK2
SEG7
SCL2
SDI2
RD0
RD1
T7G
RD2
RD3
RD4
RD5
RD6
RD7
SS2
Setting
TRIS
0
1
1
x
0
1
1
x
x
0
1
1
0
1
1
0
1
1
0
0
1
1
1
0
1
0
1
1
0
1
0
1
0
1
1
1
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
P
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I/O Type
DOG
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
TTL
I
I
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
2
2
C
C
LATD<0> data output.
PORTD<0> data input.
LCD Segment 0 output; disables all other pin functions.
CTMU pulse generator output.
LATD<1> data output.
PORTD<1> data input.
LCD Segment 1 output; disables all other pin functions.
Timer5 clock input.
Timer7 external clock gate input.
LATD<2> data output.
PORTD<2> data input.
LCD Segment 2 output; disables all other pin functions.
LATD<3> data output.
PORTD<3> data input.
LCD Segment 3 output; disables all other pin functions.
LATD<4> data output.
PORTD<4> data input.
LCD Segment 4 output; disables all other pin functions.
SPI data output (MSSP module).
LATD<5> data output.
PORTD<5> data input.
LCD Segment 5 output; disables all other pin functions.
SPI data input (MSSP module).
I
LCD Segment 5 output; disables all other pin functions.
LATD<6> data output.
PORTD<6> data input.
LCD Segment 6 output; disables all other pin functions.
SPI clock output (MSSP module); takes priority over port data.
SPI clock input (MSSP module).
I
I
LATD<7> data output.
PORTD<7> data input.
LCD Segment 7 output; disables all other pin functions.
Slave select input for MSSP module.
2
2
2
C™ data input (MSSP module). Input type depends on module setting.
C clock output (MSSP module); takes priority over port data.
C clock input (MSSP module). Input type depends on module setting.
PIC18F87K90 FAMILY
Description
DS39957D-page 167
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