MAX541ACSA+ Maxim Integrated Products, MAX541ACSA+ Datasheet - Page 3

IC DAC 16BIT SER/VOLT I/O 8-SOIC

MAX541ACSA+

Manufacturer Part Number
MAX541ACSA+
Description
IC DAC 16BIT SER/VOLT I/O 8-SOIC
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX541ACSA+

Settling Time
1µs
Number Of Bits
16
Data Interface
Serial
Number Of Converters
1
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Resolution
16 bit
Interface Type
Serial (SPI)
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.75 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Supply Current
1.1 mA
Voltage Reference
External
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
ELECTRICAL CHARACTERISTICS (continued)
(V
TIMING CHARACTERISTICS
(V
Note 1: Gain Error tested at V
Note 2: R
Note 3: Min/max range guaranteed by gain-error test. Operation outside min/max limits will result in degraded performance.
Note 4: Reference input resistance is code dependent, minimum at 8555 hex.
Note 5: Slew-rate value is measured from 0% to 63%.
Note 6: Guaranteed by design. Not production tested.
DYNAMIC PERFORMANCE—REFERENCE SECTION
STATIC PERFORMANCE—DIGITAL INPUTS
POWER SUPPLY
DAC Glitch Impulse
Digital Feedthrough
Reference -3dB Bandwidth
Reference Feedthrough
Signal-to-Noise Ratio
Reference Input Capacitance
Input High Voltage
Input Low Voltage
Input Current
Input Capacitance
Hysteresis Voltage
Positive Supply Range
Positive Supply Current
Power Dissipation
SCLK Frequency
SCLK Pulse Width High
SCLK Pulse Width Low
CS Low to SCLK High Setup
CS High to SCLK High Setup
SCLK High to CS Low Hold
SCLK High to CS High Hold
DIN to SCLK High Setup
DIN to SCLK High Hold
LDAC Pulse Width
CS High to LDAC Low Setup
V
(power-up delay)
DD
DD
DD
= +5V ±5%, V
= +5V ±5%, V
+5V, Serial-Input, Voltage-Output, 16-Bit DACs
High to CS Low
PARAMETER
PARAMETER
OUT
tolerance is typically ±20%.
REF
REF
_______________________________________________________________________________________
= +2.5V, AGND = DGND = 0, T
= +2.5V, AGND = DGND = 0, CMOS inputs, T
REF
= 2.0V, 2.5V, and 3.0V.
SYMBOL
SYMBOL
t
t
t
t
LDACS
t
t
SNR
f
CSH0
CSH1
LDAC
V
CSS0
CSS1
BW
C
C
I
t
t
V
PD
CLK
t
t
V
V
I
DD
CH
DH
CL
DS
IN
DD
IH
IN
IL
IN
H
Major-carry transition
Code = 0000 hex; CS = V
SCLK, DIN = 0 to V
Code = FFFF hex
Code = 0000 hex, V
Code = 0000 hex
Code = FFFF hex
V
(Note 6)
(Note 6)
MAX542
MAX542 (Note 6)
IN
= 0
A
= T
MIN
CONDITIONS
CONDITIONS
to T
DD
REF
MAX
A
levels
= 1Vp-p at 100kHz
= T
, unless otherwise noted.)
DD ;
MIN
LDAC = 0;
to T
MAX
, unless otherwise noted.)
4.75
MIN
MIN
2.4
45
45
45
45
30
45
40
50
50
0
TYP
0.40
TYP
120
0.3
1.5
10
10
92
75
20
1
1
MAX
MAX
5.25
0.8
1.1
±1
10
10
UNITS
mVp-p
UNITS
MHz
MHz
nVs
nVs
mW
mA
dB
pF
µA
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
V
V
V
V
3

Related parts for MAX541ACSA+