LTC1659CS8 Linear Technology, LTC1659CS8 Datasheet - Page 7

• Manufacturer Part Number: LTC1659CS8
• Description: IC D/A CONV 12BIT R-R 8-SOIC
• Manufacturer: Linear Technology

Specifications of LTC1659CS8

• Settling Time: 14µs
• Number Of Bits: 12
• Data Interface: Serial
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 720µW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Differential Nonlinearity (DNL): The difference between
the measured change and the ideal 1LSB change for any
two adjacent codes. The DNL error between any two codes
is calculated as follows:
where ΔV
two adjacent codes.
Digital Feedthrough: The glitch that appears at the ana-
log output caused by AC coupling from the digital inputs
when they change state. The area of the glitch is specifi ed
in (nV)(sec).
Full-Scale Error (FSE): The deviation of the actual full-scale
voltage from ideal. FSE includes the effects of offset and
gain errors (see Applications Information).
Integral Nonlinearity (INL): The deviation from a straight
line passing through the endpoints of the DAC transfer
curve (Endpoint INL). Because the output cannot go
below zero, the linearity is measured between full scale
and the lowest code which guarantees the output will be
TIMING DIAGRAM
DEFINITIONS
DNL = (ΔV
CS/LD
D
OUT
CLK
D
IN
OUT
is the measured voltage difference between
OUT
PREVIOUS WORD
– LSB)/LSB
B0
t
9
PREVIOUS WORD
B11
t
1
MSB
B11
t
2
B10
t
8
B10
greater than zero. The INL error at a given input code is
calculated as follows:
where V
the given input code.
Least Signifi cant Bit (LSB): The ideal voltage difference
between two successive codes.
Resolution (n): Defi nes the number of DAC output states
(2n) that divide the full-scale range. Resolution does not
imply linearity.
Voltage Offset Error (V
output when the DAC is loaded with all zeros. A single
supply DAC can have a true negative offset, but the output
cannot go below zero (see Applications Information).
For this reason, single supply DAC offset is measured at
the lowest code that guarantees the output will be greater
than zero.
INL = [V
LSB = V
t
4
OUT
REF
OUT
is the output voltage of the DAC measured at
/4096
– V
B1
OS
– (V
OS
B1
t
3
FS
): Nominally, the voltage at the
– V
B0
OS
)(code/4095)]/LSB
t
6
LSB
LTC1659
B0
CURRENT WORD
t
5
B11
t
7
1659 TD
1659fa
7