AD9752ARUZRL7 Analog Devices Inc, AD9752ARUZRL7 Datasheet - Page 10

• Manufacturer Part Number: AD9752ARUZRL7
• Description: IC DAC 12BIT 125MSPS 28TSSOP
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9752ARUZRL7

• Data Interface: Parallel
• Settling Time: 35ns
• Number Of Bits: 12
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 220mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP
• Resolution (bits): 12bit
• Sampling Rate: 125MSPS
• Input Channel Type: Parallel
• Supply Voltage Range - Analog: 4.5V To 5.5V
• Supply Voltage Range - Digital: 2.7V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9752
REFERENCE OPERATION
The AD9752 contains an internal 1.20 V bandgap reference
that can easily be disabled and overridden by an external refer-
ence. REFIO serves as either an input or output depending on
whether the internal or an external reference is selected. If
REFLO is tied to ACOM, as shown in Figure 18, the internal
reference is activated and REFIO provides a 1.20 V output. In
this case, the internal reference must be compensated externally
with a ceramic chip capacitor of 0.1 F or greater from REFIO
to REFLO. Also, REFIO should be buffered with an external
amplifier having an input bias current less than 100 nA if any
additional loading is required.
The internal reference can be disabled by connecting REFLO to
AVDD. In this case, an external reference may then be applied
to REFIO as shown in Figure 19. The external reference may
provide either a fixed reference voltage to enhance accuracy and
drift performance or a varying reference voltage for gain control.
Note that the 0.1 F compensation capacitor is not required
since the internal reference is disabled, and the high input im-
pedance (i.e., 1 M ) of REFIO minimizes any loading of the
external reference.
ADDITIONAL
EXTERNAL
AVDD
REF
LOAD
Figure 19. External Reference Configuration
Figure 18. Internal Reference Configuration
REF BUFFER
R
EXTERNAL
OPTIONAL
SET
V
I
V
REFIO
REF
REFIO
0.1 F
=
2k
/R
AD1580
SET
REFIO
FS ADJ
1.2V
REFIO
FS ADJ
AVDD
+1.2V REF
+1.2V REF
AD9752
AD9752
REFLO
REFLO
OUT1
OUT2
Figure 20. Single-Supply Gain Control Circuit
150pF
AGND
150pF
R
AD7524
FB
REFERENCE
CONTROL
AMPLIFIER
DB7–DB0
CURRENT
SOURCE
ARRAY
CURRENT
V
SOURCE
AVDD
ARRAY
DD
+5V
V
AVDD
REF
AVDD
R
SET
0.1V TO 1.2V
–10–
I
V
REF
REF
REFERENCE CONTROL AMPLIFIER
The AD9752 also contains an internal control amplifier that is
used to regulate the DAC’s full-scale output current, I
The control amplifier is configured as a V-I converter as shown
in Figure 19, such that its current output, I
the ratio of the V
in Equation 4. I
sources with the proper scaling factor to set I
Equation 3.
The control amplifier allows a wide (10:1) adjustment span of
I
62.5 A and 625 A. The wide adjustment span of I
provides several application benefits. The first benefit relates
directly to the power dissipation of the AD9752, which is
proportional to I
The second benefit relates to the 20 dB adjustment, which is
useful for system gain control purposes.
The small signal bandwidth of the reference control amplifier is
approximately 0.5 MHz. The output of the control amplifier is
internally compensated via a 150 pF capacitor that limits the
control amplifier small-signal bandwidth and reduces its
output impedance. Since the –3 dB bandwidth corresponds to
the dominant pole, and hence the time constant, the settling
time of the control amplifier to a stepped reference input re-
sponse can be approximated. In this case, the time constant can
be approximated to be 320 ns.
There are two methods in which I
R
which the internal reference is disabled, and the common-mode
voltage of REFIO is varied over its compliance range of 1.25 V
to 0.10 V. REFIO can be driven by a single-supply amplifier or
DAC, thus allowing I
input impedance of REFIO is approximately 1 M , a simple,
low cost R-2R ladder DAC configured in the voltage mode
topology may be used to control the gain. This circuit is shown
in Figure 20 using the AD7524 and an external 1.2 V reference,
the AD1580.
=
OUTFS
/R
SET
SET
. The first method is suitable for a single-supply system in
REFIO
FS ADJ
over a 2 mA to 20 mA range by setting IREF between
AD9752
+1.2V REF
REFLO
REF
OUTFS
REFIO
is copied over to the segmented current
150pF
REF
and an external resistor, R
(refer to the Power Dissipation section).
to be varied for a fixed R
CURRENT
SOURCE
ARRAY
AVDD
REF
AVDD
can be varied for a fixed
REF
OUTFS
, is determined by
SET
SET
as stated in
, as stated
. Since the
OUTFS
OUTFS
REV. 0
.