IDTICS8702BY IDT, Integrated Device Technology Inc, IDTICS8702BY Datasheet - Page 9

• Manufacturer Part Number: IDTICS8702BY
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Dividerr

Specifications of IDTICS8702BY

• Number Of Clock Inputs: 1
• Mode Of Operation: Differential
• Output Frequency: 250MHz
• Output Logic Level: LVCMOS/LVTTL
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

W
Figure 1 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The
8702BY
R
I
CLK/nCLK I
For applications not requiring the use of the differential input,
both CLK and nCLK can be left floating. Though not required,
but for additional protection, a 1kΩ resistor can be tied from
CLK to ground.
LVCMOS C
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
NPUTS
ECOMMENDATIONS FOR
IRING THE
:
ONTROL
NPUT
D
IFFERENTIAL
:
P
INS
:
U
I
NUSED
NPUT TO
F
IGURE
Single Ended Clock Input
I
NPUT AND
A
1. S
A
CCEPT
PPLICATION
INGLE
D
IFFERENTIAL
E
O
S
C1
0.1u
NDED
INGLE
UTPUT
V_REF
DD
www.idt.com
/2 is
S
IGNAL
E
P
NDED
9
INS
I
NFORMATION
ratio of R1 and R2 might need to be adjusted to position the
V_REF in the center of the input voltage swing. For example, if
the input clock swing is only 2.5V and V
be 1.25V and R2/R1 = 0.609.
D
O
LVCMOS O
All unused LVCMOS output can be left floating. We
recommend that there is no trace attached.
-
TO
1K
RIVING
R1
1K
R2
UTPUTS
L
VDD
-LVCMOS/LVTTL C
EVELS
D
IFFERENTIAL
CLK
nCLK
:
UTPUT
:
I
NPUT
L
OW
LOCK
DD
= 3.3V, V_REF should
S
ICS8702
KEW
G
REV. E JULY 25, 2010
ENERATOR
, ÷1, ÷2