MT46V64M8P-75 Micron Technology Inc, MT46V64M8P-75 Datasheet - Page 63
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MT46V64M8P-75
Manufacturer Part Number
MT46V64M8P-75
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT46V64M8P-75.pdf
(91 pages)
Specifications of MT46V64M8P-75
Lead Free Status / Rohs Status
Compliant
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Figure 28:
PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN
Command
Command
Command
Address
Address
Address
Consecutive READ Bursts
DQS
DQS
DQS
CK#
CK#
CK#
DQ
DQ
DQ
CK
CK
CK
Notes:
Bank,
READ
Col n
Bank,
READ
Bank,
READ
Col n
Col n
T0
T0
T0
1. DO n (or b) = data-out from column n (or column b).
2. BL = 4 or BL = 8 (if BL = 4, the bursts are concatenated; if BL = 8, the second burst interrupts
3. Three subsequent elements of data-out appear in the programmed order following DO n.
4. Three (or seven) subsequent elements of data-out appear in the programmed order follow-
5. Shown with nominal
6. Example applies only when READ commands are issued to same device.
the first).
ing DO b.
CL = 2
NOP
NOP
NOP
T1
T1
T1
CL = 2.5
CL = 3
t
AC,
Bank,
Bank,
Bank,
READ
Col b
READ
Col b
READ
Col b
T2
T2
T2
t
DQSCK, and
63
DO
n
T2n
T2n
DO
n
T3
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T3
NOP
T3
NOP
t
DQSQ.
DO
n
T3n
T3n
T3n
512Mb: x4, x8, x16 DDR SDRAM
Transitioning Data
T4
NOP
T4
T4
NOP
NOP
DO
b
T4n
T4n
T4n
DO
©2000 Micron Technology, Inc. All rights reserved.
b
T5
T5
T5
NOP
NOP
NOP
DO
Don’t Care
b
T5n
T5n
T5n
Operations
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