CY7C4255-25AC Cypress Semiconductor Corp, CY7C4255-25AC Datasheet - Page 12

• Manufacturer Part Number: CY7C4255-25AC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C4255-25AC

• Density: 128Kb
• Word Size: 18b
• Sync/async: Synchronous
• Expandable: Yes
• Package Type: TQFP
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / Rohs Status: Not Compliant

Switching Waveforms
Programmable Almost Full Flag Timing (applies only in SMODE (SMODE is LOW))
Write Programmable Registers
Notes:
28. If a write is performed on this rising edge of the write clock, there will be Full
29. PAF offset = m.
30. t
D
the rising edge of WCLK is less than t
WCLK
WEN2
WCLK
0
SKEW3
RCLK
WEN
WEN
REN
–D
PAF
LD
17
is the minimum time between a rising RCLK and a rising WCLK edge for PAF to change state during that clock cycle. If the time between the edge of RCLK and
t
t
CLKH
CLKH
FULL– M + 1 WORDS
(continued)
t
SKEW3
CLK
t
t
ENS
ENS
t
IN FIFO
DS
, then PAF may not change state until the next WCLK rising edge.
PAE OFFSET
t
t
ENS
ENS
t
t
ENH
ENH
t
t
CLKL
CLKL
t
ENH
t
DH
Note
Note
29
12
PAF OFFSET
28
(m 1) words of the FIFO when PAF goes LOW.
t
PAF
t
ENS
t
SKEW3
FULL– M WORDS
IN FIFO
t
[30]
ENS
PAE OFFSET
D
0
[26]
– D
t
ENH
11
t
PAF synch
CY7C4255
CY7C4265
4255–16
4255–17