SLFLD25-6GBJI STEC, SLFLD25-6GBJI Datasheet - Page 13

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SLFLD25-6GBJI

Manufacturer Part Number
SLFLD25-6GBJI
Description
Manufacturer
STEC
Type
Flash Driver
Datasheet

Specifications of SLFLD25-6GBJI

Density
6GByte
Operating Supply Voltage (typ)
5V
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Package Type
Not Required
Mounting
Screw
Pin Count
44
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Programmable
Yes
Lead Free Status / Rohs Status
Not Compliant
SLFLD25-xxxJ(I)
Drive/Head Register
This register select the device address translation (CHS or
LBA) and provides head address (CHS) or high order
address bits 27:24 for LBA.
bit Name
7
6
5
4
3-0 Head Number (HS3-HS0)
bit7
1
1
LBA
1
DRV (DRiVe select)
bit6
LBA
bit5
1
bit4
DRV
Function
This bit is set to “1”.
LBA is a flag to select either Cylinder/Head/Sector (CHS) or Logical Block
Address (LBA) mode. When LBA=0, CHS mode is selected. When LBA=1, LBA
mode is selected. In LBA mode, the Logical Block Address is interrupted as
follows:
LBA07-LBA00: Sector Number Register D7-D0
LBA15-LBA08: Cylinder Low Register D7-D0
LBA23-LBA16: Cylinder High Register D7-D0
LBA27-LBA24: Drive/Head Register bits HS3-HS0
This bit is set to “1”.
This bit is used for selecting the Master (drive 0) and Slave (drive 1) in
Master/Slave organization. The drive is set to be drive 0 or 1 by using DRV# of
the Socket and Copy register.
These bits are used for selecting the Head number. Bit 3 is MSB. In LBA mode,
these bits represent the LBA address 27:24.
bit3
Head No. or LBA bits 27:24
bit2
Document Part Number 61000-02817-109 March 2005
bit1
bit0
IDE FLASH DRIVE
Page 13

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