PEB20571FV31XP Infineon Technologies, PEB20571FV31XP Datasheet - Page 140

• Manufacturer Part Number: PEB20571FV31XP
• Manufacturer: Infineon Technologies

Specifications of PEB20571FV31XP

• Lead Free Status / Rohs Status: Compliant

one channel
two channels
four channels 8 bytes
This leads to the following address configuration:
In the receive direction, blocks are swapped in two cases:
• The receive buffer is full. The swap is issued immediately after the buffer has become
• An end of a frame indication was detected at the beginning of a frame. The frame is
In the transmit direction blocks are swapped each time a start transmission command is
issued in the command register.
Data Sheet
Table 41
No. of
Channels
1 channel
2 channels
4 channels
full.
programmable to 62.5 µs or 10 µs
case of a buffer full indication followed by an end of frame indication, this condition
becomes true only if additionally there was no FULL interrupt during the previous
frame.
GHDLCU Receive Buffer Configuration
Direction
Receive
Transmit
Receive
Transmit
Receive
Transmit
Receive Buffer
Block 0
32 bytes
16 bytes
0x2040
0x2000
0x2040
0x2000
0x2040
0x2000
ch 0
Block 1
32 bytes
16 bytes
8 bytes
(see Chapter
123
0x2060
0x2020
Channel Address
ch1
Transmit Buffer
Block 0
32 bytes
16 bytes
8 bytes
6.2.6.15). To avoid a loss of data in
0x2070
0x2030
ch 2
Functional Description
Block 1
32 bytes
16 bytes
8 bytes
PEB 20570
PEB 20571
0x2060
0x2020
0x2050
0x2010
2003-07-31
ch3