NL128102AC28-07 Renesas Electronics America, NL128102AC28-07 Datasheet - Page 16

• Manufacturer Part Number: NL128102AC28-07
• Manufacturer: Renesas Electronics America

Specifications of NL128102AC28-07

• Lead Free Status / Rohs Status: Supplier Unconfirmed

INPUT SIGNAL TIMINGS
(1) Input signal specifications for LCD controller
16
CLK
Hsync
Vsync
DATA
Note 1: Timing specifications are defined by the input signals of LVDS transmitter.
Note 2: Both of “time” and “CLK number” of the “th” must keep the Minimum value of specification.
Note 3: During operation, fluctuation of Hsync period must not exceed ±1 CLK. Otherwise function error will occur
Frequency
Duty
Rise, fall
Period
Display period
Front-porch
Pulse width
Back-porch
∗thp + thb
Period
Display period
Front-porch
Pulse width
Back-porch
∗tvf + tvp + tvb
Vsync-Hsync timing
Hsync-Vsync timing
DATA-CLK (Set up)
CLK-DATA (Hold)
Rise, fall
THC63LVDF83A (THine) or equivalent products are recommended for LVDS transmitter.
in LCD module.
e.g.: Acceptable fluctuation range is 799-801 CLK, when the Hsync period is 800 CLK.
Parameter
Symbol
tc/tcl
thp∗
thb∗
tvp∗
tvb∗
tvhs
tvhh
1/tc
tvf∗
tcrf
thd
tvd
thf
trf
th
tv
ts
th
Data Sheet EN0537EJ1V0DS
1028
Min.
51.5
12.3
750
110
–
–
–
–
–
–
–
–
–
–
4
1
1
Note 1
15.630
16.661
Note 1
18.52
1066
1024
54.0
Typ.
844
640
124
56
38
–
–
1
3
–
–
–
17.47
Max.
56.5
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
MHz
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
Unit
ms
ns
ns
ns
µ s
ns
ns
H
H
H
H
H
H
–
NL128102AC28-07
Typ = 64.0 kHz
Note 2, 3
Typ = 60.0 Hz
for Hsync
for Hsync
Remarks
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–