MT46V16M16TG-5BL Micron Technology Inc, MT46V16M16TG-5BL Datasheet - Page 55

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MT46V16M16TG-5BL

Manufacturer Part Number
MT46V16M16TG-5BL
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT46V16M16TG-5BL

Lead Free Status / Rohs Status
Not Compliant
Figure 21:
PDF: 09005aef80768abb/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 256Mb DDR: Rev. O, Core DDR: Rev. B 1/09 EN
INITIALIZATION Flow Diagram
Step
10
11
12
13
14
15
16
17
18
19
20
21
1
2
3
4
5
6
7
8
9
Assert NOP or DESELECT commands for t RFC
Configure load mode register and reset DLL
Optional LMR command to clear DLL bit
Assert NOP or DESELECT for t MRD time
Assert NOP or DESELECT for t MRD time
Assert NOP or DESELECT for t MRD time
Bring CKE HIGH with a NOP command
DRAM is ready for any valid command
Assert NOP or DESELECT for t RFC time
Assert NOP or DESELECT for t RP time
Assert NOP or DESELECT for t RP time
Configure extended mode register
Issue AUTO REFRESH command
Issue AUTO REFRESH command
CKE must be LVCMOS LOW
Apply stable CLOCKs
V
Wait at least 200µs
Apply V
DD
PRECHARGE ALL
PRECHARGE ALL
and V
REF
DD
and V
Q ramp
TT
53
Micron Technology, Inc., reserves the right to change products or specifications without notice.
256Mb: x4, x8, x16 DDR SDRAM
©2003 Micron Technology, Inc. All rights reserved.
Operations

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