BCM5770RA1KPBG Broadcom, BCM5770RA1KPBG Datasheet - Page 2

• Manufacturer Part Number: BCM5770RA1KPBG
• Manufacturer: Broadcom

Specifications of BCM5770RA1KPBG

• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

The BCM5770/BCM5770R is a highly integrated, multiport SATA-I
controller that has been designed for high performance storage
applications requiring low host CPU utilization and maximum I/O
performance.
The device communicates with the host via a 64-bit, 133-MHz PCI-X1.0
bus interface. It attaches directly to a maximum of eight SATA-I disk
drives or to backplanes on the target side via a high-performance,
integrated SATA PHY that is capable of driving long-length backplanes.
Additionally, the BCM5770/BCM5770R supports hot-plug capability,
enabling SATA disk drives to be inserted and removed from a storage
rack or server without affecting system operation.
A high-bandwidth host arbiter (1 GB/s) decouples the PCI-X host
interface from the SATA ports, enabling maximum throughput for
workloads demanding sequential I/O performance.
Data from/to the drives are broken into 8-KB data FISes on the SATA
links. The PCIX interface is arbitrated based on a round robin or LRU
algorithm. Data is transferred in 512-byte blocks on the PCIX, thereby
allowing fairness among the data channels.
The BCM5770/BCM5770R provides an interrupt coalescing mechanism
to pace the host interrupts it generates. This allows host software to
Broadcom
or its subsidiaries in the United States and certain other countries. All other trademarks mentioned are the
property of their respective owners.
BROADCOM CORPORATION
16215 Alton Parkway, P.O. Box 57013
Irvine, California 92619-7013
© 2004 by BROADCOM CORPORATION. All rights reserved.
5770/5770R-PB01-R10/08/04
®
, the pulse logo, and Connecting everything
Controller
Controller
FC/iSCSI
FC/iSCSI
External Storage System
CPU
CPU
®
BCM5770
BCM5770
BCM5770
BCM5770
®
are trademarks of Broadcom Corporation and/
BCM5770/BCM5770R Applications
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batch-process interrupts efficiently. In addition, the BCM5770/
BCM5770R incorporates a mechanism to reduce IO reads by
periodically DMAing the BCM5770/BCM5770R status block into host
memory. Both of these mechanisms vastly reduce the host CPU
utilization by limiting the amount of adaptor accesses that must be
performed.
A Low Pin Count (LPC) Interface Specification 1.0 compliant interface
is available to connect the BCM5770/BCM5770R to an external flash/
ROM up to 128 KB. Three general-purpose I/O pins with tri-state
capability are available and can be specially configured to drive LEDs.
An I
external enclosure management device or with a serial EEPROM.
On-board power supply regulators are available that generate local 2.5V
and 1.2V rails, allowing the entire chip to run from a single external 3.3V
power source.
Built-in PRBS or pseudo-random bit sequence test generators/checkers
are available per port for PHY testing without the use of additional
hardware or drives. These are programmed from the in-band PCI
interface.
2
C master interface is also available to communicate with an
PCI-X
PCI-X
BCM5770
BCM5770
Server Storage
Phone: [phone]
Fax: [phone]
E-mail: [e-mail]
Web: www.broadcom.com
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