MT48LC8M16A2P-75:GTR Micron Technology Inc, MT48LC8M16A2P-75:GTR Datasheet - Page 58

• Manufacturer Part Number: MT48LC8M16A2P-75:GTR
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48LC8M16A2P-75:GTR

• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 6/5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 150mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

Figure 42:
PDF: 09005aef8091e66d/Source: 09005aef8091e625
128MSDRAM_2.fm - Rev. N 1/09 EN
DQML, DQMH
A0–A9, A11
COMMAND
BA0, BA1
DQM /
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
READ – Without Auto Precharge
ACTIVE
ROW
ROW
BANK
T0
t CMH
t CKH
t AH
t AH
t AH
Notes:
t RCD
t RAS
t RC
t CK
T1
NOP
1. For this example, BL = 4, CL = 2, and the READ burst is followed by a “manual” PRECHARGE.
2. x16: A9 and A11 = “Don’t Care.”
DISABLE AUTO PRECHARGE
x8: A11 = “Don’t Care.”
t CMS
t CL
COLUMN m
BANK
T2
READ
t CMH
t CH
CAS Latency
2
T3
NOP
t LZ
t AC
58
T4
D
NOP
OUT
t OH
t AC
m
Micron Technology, Inc., reserves the right to change products or specifications without notice.
D
T5
OUT
NOP
t OH
m+1
t AC
SINGLE BANKS
ALL BANKS
PRECHARGE
BANK(S)
D
T6
OUT
128Mb: x4, x8, x16 SDRAM
t OH
m+2
t RP
t AC
©1999 Micron Technology, Inc. All rights reserved.
D
T7
NOP
OUT
t OH
m+3
Timing Diagrams
t HZ
BANK
ROW
ACTIVE
ROW
T8
DON’T CARE
UNDEFINED