A2557SEB-T Allegro Microsystems Inc, A2557SEB-T Datasheet - Page 12

A2557SEB-T

Manufacturer Part Number
A2557SEB-T
Description
Manufacturer
Allegro Microsystems Inc
Datasheet

Specifications of A2557SEB-T

Switch Type
Low Side
Power Switch Family
A2557
Input Voltage
7V
Output Current
300mA
Number Of Outputs
4
Mounting
Surface Mount
Supply Current
30mA
Package Type
PLCC
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Pin Count
28
Lead Free Status / Rohs Status
Compliant
A2557
mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
nor for any in fringe ment of patents or other rights of third parties which may result from its use.
Copyright ©1998-2009, Allegro MicroSystems, Inc.
The products described here are manufactured under one or more U.S. patents or U.S. patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per-
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use;
16X
0.41 ±0.10
0.10
C
16
1
For Reference Only
Pins 4 and 5, and 12 and 13 internally fused
Dimensions in millimeters
(reference JEDEC MS-013 AA)
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A
2
10.30±0.20
1.27
with internally fused pins 4 and 5, and 12 and 13
For the latest version of this document, visit our website:
7.50±0.10
LB Package, 16-pin SOIC
0.20 ±0.10
SEATING
PLANE
2.65 MAX
www.allegromicro.com
10.30±0.33
with Fault Detection and Sleep Mode
C
A Terminal #1 mark area
B
Reference pad layout (reference IPC SOIC127P1030X265-16M)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
GAUGE PLANE
4° ±4
0.25
0.84
SEATING PLANE
0.27
+0.44
–0.43
+0.07
–0.06
0.65
Protected Quad Driver
2.25
16
1
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
B
2
PCB Layout Reference View
1.27
9.50
12

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