SI5010-B-GMR Silicon Laboratories Inc, SI5010-B-GMR Datasheet - Page 14

• Manufacturer Part Number: SI5010-B-GMR
• Description: Clock and Data Recovery 20-Pin QFN EP T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5010-B-GMR

• Package: 20QFN EP
• Maximum Data Rate: 622.08 Mbps
• Power Supply Type: Analog
• Typical Supply Current: 124 mA
• Typical Operating Supply Voltage: 2.5 V
• Minimum Operating Supply Voltage: 2.375 V
• Maximum Operating Supply Voltage: 2.625 V

Si5010
5. Pin Descriptions: Si5010
14
3, 8, 18, and
2, 7, 11, 14
GND Pad
Pin #
10
1
4
5
6
9
Pin Name
REFCLK+
REFCLK–
REXT
DIN+
GND
DIN–
VDD
LOL
Figure 10. Si5010 Pin Configuration
I/O
Table 8. Si5010 Pin Descriptions
O
REFCLK+
REFCLK–
I
I
REXT
GND
VDD
Signal Level
See Table 2
See Table 2
1
2
3
4
5
20 19 18 17 16
LVTTL
6
2.5 V
GND
Connection
7
Top View
Rev. 1.4
GND
Pad
8
9
10
External Bias Resistor.
This resistor is used by onboard circuitry to estab-
lish bias currents within the device. This pin must
be connected to GND through a 10 kΩ (1%) resis-
tor.
Supply Voltage.
Nominally 2.5 V.
Supply Ground.
Nominally 0.0 V. The GND pad found on the bottom
of the 20-pin micro leaded package (see Figure 11)
must be connected directly to supply ground.
Differential Reference Clock.
The reference clock sets the initial operating fre-
quency used by the onboard PLL for clock and data
recovery. Additionally, the reference clock is used to
derive the clock output when no data is present.
Loss-of-Lock.
This output is driven high when the recovered clock
frequency deviates from the reference clock by the
amount specified in Table 4 on page 7.
Differential Data Input.
Clock and data are recovered from the differential
signal present on these pins.
15
14
13
12
11
PWRDN/CAL
VDD
DOUT+
DOUT–
VDD
Description