A1391SEHLT-T Allegro, A1391SEHLT-T Datasheet - Page 10

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A1391SEHLT-T

Manufacturer Part Number
A1391SEHLT-T
Description
Manufacturer
Allegro
Datasheets

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A1391SEHLT-T
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A1391, A1392,
A1393, and A1395
A139x are low-power Hall effect sensor ICs that are perfect for
power sensitive customer applications. The current consumption
of these devices is typically 3.2 mA, while the device is in the
active mode, and less than 25 μA when the device is in the sleep
mode. Toggling the logic level signal connected to the S ¯ ¯ L ¯ ¯ E ¯ ¯ E ¯ ¯ P ¯ pin
drives the device into either the active mode or the sleep mode.
A logic low sleep signal drives the device into the sleep mode,
while a logic high sleep signal drives the device into the active
mode.
In the case in which the VREF pin is powered before the VCC
pin, the device will not operate within the specified limits until
the supply voltage is equal to the reference voltage. When the
device is switched from the sleep mode to the active mode, a time
defined by t
B field
Figure 1. A139x Timing Diagram
V
SLEEP
V
V
OUT
+B
–B
I
CC
CC
0
PON
IMPEDANCE
must elapse before the output of the device is
HIGH
t
PON
Micro Power 3 V Linear Hall Effect Sensors with
Tri-State Output and User Selectable Sleep Mode
Device Low-Power Functionality
t
POFF
IMPEDANCE
HIGH
valid. The device output transitions into the high impedance state
approximately t
the S ¯ ¯ L ¯ ¯ E ¯ ¯ E ¯ ¯ P ¯ pin (see figure 1).
If possible, it is recommended to power-up the device in the
sleep mode. However, if the application requires that the device
be powered on in the active mode, then a 10 kΩ resistor in series
with the S ¯ ¯ L ¯ ¯ E ¯ ¯ E ¯ ¯ P ¯ pin is recommended. This resistor will limit the
current that flows into the S ¯ ¯ L ¯ ¯ E ¯ ¯ E ¯ ¯ P ¯ pin if certain semiconductor
junctions become forward biased before the ramp up of the volt-
age on the VCC pin. Note that this current limiting resistor is not
required if the user connects the S ¯ ¯ L ¯ ¯ E ¯ ¯ E ¯ ¯ P ¯ pin directly to the VCC
pin. The same precautions are advised if the device supply is
powered-off while power is still applied to the S ¯ ¯ L ¯ ¯ E ¯ ¯ E ¯ ¯ P ¯ pin.
t
PON
POFF
seconds after a logic low signal is applied to
115 Northeast Cutoff, Box 15036
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
t
POFF
IMPEDANCE
HIGH
10

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