XCR3384XL-10PQ208C Xilinx Inc, XCR3384XL-10PQ208C Datasheet - Page 13

• Manufacturer Part Number: XCR3384XL-10PQ208C
• Description: IC CPLD 3.3V ZERO PWR 208-PQFP
• Manufacturer: Xilinx Inc
• Series: CoolRunner XPLA3r

Specifications of XCR3384XL-10PQ208C

• Programmable Type: In System Programmable (min 1K program/erase cycles)
• Delay Time Tpd(1) Max: 9.0ns
• Voltage Supply - Internal: 3 V ~ 3.6 V
• Number Of Logic Elements/blocks: 24
• Number Of Macrocells: 384
• Number Of Gates: 9000
• Number Of I /o: 172
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 208-MQFP, 208-PQFP
• Features: Programmable
• Voltage: 3.3V
• Memory Type: EEPROM
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Logic Elements/cells: -
• Other names: XCR3384XL10PQ208C

Warranty Disclaimer
THESE PRODUCTS ARE SUBJECT TO THE TERMS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED
AT http://www.xilinx.com/warranty.htm. THIS LIMITED WARRANTY DOES NOT EXTEND TO ANY USE OF THE
PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE SPECIFICATIONS STATED ON THE
THEN-CURRENT XILINX DATA SHEET FOR THE PRODUCTS. PRODUCTS ARE NOT DESIGNED TO BE FAIL-SAFE
AND ARE NOT WARRANTED FOR USE IN APPLICATIONS THAT POSE A RISK OF PHYSICAL HARM OR LOSS OF
LIFE. USE OF PRODUCTS IN SUCH APPLICATIONS IS FULLY AT THE RISK OF CUSTOMER SUBJECT TO
APPLICABLE LAWS AND REGULATIONS.
Additional Information
CoolRunner XPLA3 Data Sheets and Application Notes
Device Package User Guide
Revision History
The following table shows the revision history for this document
DS024 (v2.0) March 31, 2006
Product Specification
Notes:
1.
XCR3384XL-12FT256I
XCR3384XL-12FG324I
Part Marking Number
Device Ordering and
02/08/01
04/11/01
04/19/01
08/10/01
01/08/02
01/06/03
07/15/03
08/21/03
02/13/04
04/08/05
03/31/06
C = Commercial: T
Date
R
Version
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
A
= 0° to +70°C; I = Industrial: T
(pin-to-pin
Initial Xilinx release.
Update TSUF spec to meet UMC characterization data. Added Typical I/V curve,
added
and package.
Updated Typical I/V curve,
Updated AC Electrical Characteristics; Internal Timing Parameters; added TQ144 package
and pinouts.
Updated T
Table, renamed T
T
more closely resemble true test conditions, added note for T
Changed TQ144 pinout for pins 34 and 35.
Changed to Preliminary, updated AC and DC specs per characterization review. Updated
Note 5 on AC Specifications from 10 mA to 13 mA at 3.6V. Updated T
Updated Ordering Information format.
Updated test conditions for I
Updated Package Device Marking Pin 1 orientation.
Add solder temperature specification. Add links to application notes, data sheets, and
packages.
Added I
Added Warranty Disclaimer; Added Pb-Free ordering information.
Speed
delay)
12 ns
12 ns
CONFIG
Table
CCSB
spec. Updated T
SUF
Symbol
2: Total User I/O; changed V
FG324
FT256
Typical and T
Pkg.
spec to match software timing. Added single p-term setup time (T
SU
A
= –40° to +85°C
to T
www.xilinx.com
256-ball Fine-Pitch BGA (FT)
324-ball Fineline BGA Package (FG)
SU2
No. of
HI
Pins
APRPW
Figure
spec to correct a typo. Updated AC Load Circuit diagram to
IL
for setup time through the OR array. Updated T
and I
Device Packages
2: added voltage levels.
specifications. Removed T
IH
.
Revision
OH
spec. Added 324-ball Fineline BGA pinouts
Package Type
XCR3384XL: 384 Macrocell CPLD
POD
SOL
delay measurement.
specification.
PCO
(added T
INIT
SU1
Operating
spec and
Range
Figure
) to AC
PTCK
I
I
(1)
2;
).
13